1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2008 4 * Graeme Russ, graeme.russ@gmail.com. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <asm/u-boot-x86.h> 11 #include <flash.h> 12 #include <netdev.h> 13 #include <ns16550.h> 14 #include <asm/msr.h> 15 #include <asm/cache.h> 16 #include <asm/cpu.h> 17 #include <asm/io.h> 18 #include <asm/mtrr.h> 19 #include <asm/arch/tables.h> 20 #include <asm/arch/sysinfo.h> 21 #include <asm/arch/timestamp.h> 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 int arch_cpu_init(void) 26 { 27 int ret = get_coreboot_info(&lib_sysinfo); 28 if (ret != 0) { 29 printf("Failed to parse coreboot tables.\n"); 30 return ret; 31 } 32 33 timestamp_init(); 34 35 return x86_cpu_init_f(); 36 } 37 38 int board_early_init_f(void) 39 { 40 return 0; 41 } 42 43 int print_cpuinfo(void) 44 { 45 return default_print_cpuinfo(); 46 } 47 48 int last_stage_init(void) 49 { 50 if (gd->flags & GD_FLG_COLD_BOOT) 51 timestamp_add_to_bootstage(); 52 53 return 0; 54 } 55 56 #ifndef CONFIG_SYS_NO_FLASH 57 ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) 58 { 59 return 0; 60 } 61 #endif 62 63 int board_eth_init(bd_t *bis) 64 { 65 return pci_eth_init(bis); 66 } 67 68 void board_final_cleanup(void) 69 { 70 /* Un-cache the ROM so the kernel has one 71 * more MTRR available. 72 * 73 * Coreboot should have assigned this to the 74 * top available variable MTRR. 75 */ 76 u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1; 77 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff; 78 79 /* Make sure this MTRR is the correct Write-Protected type */ 80 if (top_type == MTRR_TYPE_WRPROT) { 81 struct mtrr_state state; 82 83 mtrr_open(&state); 84 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); 85 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); 86 mtrr_close(&state); 87 } 88 89 /* Issue SMI to Coreboot to lock down ME and registers */ 90 printf("Finalizing Coreboot\n"); 91 outb(0xcb, 0xb2); 92 } 93 94 void panic_puts(const char *str) 95 { 96 NS16550_t port = (NS16550_t)0x3f8; 97 98 NS16550_init(port, 1); 99 while (*str) 100 NS16550_putc(port, *str++); 101 } 102 103 int misc_init_r(void) 104 { 105 return 0; 106 } 107