1 /* 2 * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 10 #define PCI_DEV_CONFIG(segbus, dev, fn) ( \ 11 (((segbus) & 0xfff) << 20) | \ 12 (((dev) & 0x1f) << 15) | \ 13 (((fn) & 0x07) << 12)) 14 15 /* Platform Controller Unit */ 16 #define LPC_DEV 0x1f 17 #define LPC_FUNC 0 18 19 /* Enable UART */ 20 #define UART_CONT 0x80 21 22 /* UART PAD definitions */ 23 #define UART_RXD_COMMUITY 1 24 #define UART_TXD_COMMUITY 1 25 #define UART_RXD_FAMILY 4 26 #define UART_TXD_FAMILY 4 27 #define UART_RXD_PAD 2 28 #define UART_TXD_PAD 7 29 #define UART_RXD_FUNC 3 30 #define UART_TXD_FUNC 3 31 32 /* IO Memory */ 33 #define IO_BASE_ADDRESS 0xfed80000 34 35 static inline uint32_t gpio_pconf0(int community, int family, int pad) 36 { 37 return IO_BASE_ADDRESS + community * 0x8000 + 0x4400 + 38 family * 0x400 + pad * 8; 39 } 40 41 static void gpio_select_func(int community, int family, int pad, int func) 42 { 43 uint32_t pconf0_addr = gpio_pconf0(community, family, pad); 44 45 clrsetbits_le32(pconf0_addr, 0xf << 16, func << 16); 46 } 47 48 static void x86_pci_write_config32(int dev, unsigned int where, u32 value) 49 { 50 unsigned long addr; 51 52 addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3); 53 writel(value, addr); 54 } 55 56 /* This can be called after memory-mapped PCI is working */ 57 int setup_internal_uart(int enable) 58 { 59 /* Enable or disable the legacy UART hardware */ 60 x86_pci_write_config32(PCI_DEV_CONFIG(0, LPC_DEV, LPC_FUNC), UART_CONT, 61 enable); 62 63 /* All done for the disable part, so just return */ 64 if (!enable) 65 return 0; 66 67 /* 68 * Set up the pads to the UART function. This allows the signals to 69 * leave the chip 70 */ 71 gpio_select_func(UART_RXD_COMMUITY, UART_RXD_FAMILY, 72 UART_RXD_PAD, UART_RXD_FUNC); 73 gpio_select_func(UART_TXD_COMMUITY, UART_TXD_FAMILY, 74 UART_TXD_PAD, UART_TXD_FUNC); 75 76 return 0; 77 } 78 79 void board_debug_uart_init(void) 80 { 81 setup_internal_uart(1); 82 } 83