1menu "x86 architecture" 2 depends on X86 3 4config SYS_ARCH 5 default "x86" 6 7config USE_PRIVATE_LIBGCC 8 default y 9 10config SYS_VSNPRINTF 11 default y 12 13choice 14 prompt "Mainboard vendor" 15 default VENDOR_COREBOOT 16 17config VENDOR_COREBOOT 18 bool "coreboot" 19 20config VENDOR_EMULATION 21 bool "emulation" 22 23config VENDOR_GOOGLE 24 bool "Google" 25 26config VENDOR_INTEL 27 bool "Intel" 28 29endchoice 30 31# board-specific options below 32source "board/coreboot/Kconfig" 33source "board/emulation/Kconfig" 34source "board/google/Kconfig" 35source "board/intel/Kconfig" 36 37# platform-specific options below 38source "arch/x86/cpu/baytrail/Kconfig" 39source "arch/x86/cpu/coreboot/Kconfig" 40source "arch/x86/cpu/ivybridge/Kconfig" 41source "arch/x86/cpu/qemu/Kconfig" 42source "arch/x86/cpu/quark/Kconfig" 43source "arch/x86/cpu/queensbay/Kconfig" 44 45# architecture-specific options below 46 47config SYS_MALLOC_F_LEN 48 default 0x800 49 50config RAMBASE 51 hex 52 default 0x100000 53 54config XIP_ROM_SIZE 55 hex 56 depends on X86_RESET_VECTOR 57 default ROM_SIZE 58 59config CPU_ADDR_BITS 60 int 61 default 36 62 63config HPET_ADDRESS 64 hex 65 default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 66 67config SMM_TSEG 68 bool 69 default n 70 71config SMM_TSEG_SIZE 72 hex 73 74config X86_RESET_VECTOR 75 bool 76 default n 77 78config SYS_X86_START16 79 hex 80 depends on X86_RESET_VECTOR 81 default 0xfffff800 82 83config BOARD_ROMSIZE_KB_512 84 bool 85config BOARD_ROMSIZE_KB_1024 86 bool 87config BOARD_ROMSIZE_KB_2048 88 bool 89config BOARD_ROMSIZE_KB_4096 90 bool 91config BOARD_ROMSIZE_KB_8192 92 bool 93config BOARD_ROMSIZE_KB_16384 94 bool 95 96choice 97 prompt "ROM chip size" 98 depends on X86_RESET_VECTOR 99 default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 100 default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 101 default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 102 default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 103 default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 104 default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 105 help 106 Select the size of the ROM chip you intend to flash U-Boot on. 107 108 The build system will take care of creating a u-boot.rom file 109 of the matching size. 110 111config UBOOT_ROMSIZE_KB_512 112 bool "512 KB" 113 help 114 Choose this option if you have a 512 KB ROM chip. 115 116config UBOOT_ROMSIZE_KB_1024 117 bool "1024 KB (1 MB)" 118 help 119 Choose this option if you have a 1024 KB (1 MB) ROM chip. 120 121config UBOOT_ROMSIZE_KB_2048 122 bool "2048 KB (2 MB)" 123 help 124 Choose this option if you have a 2048 KB (2 MB) ROM chip. 125 126config UBOOT_ROMSIZE_KB_4096 127 bool "4096 KB (4 MB)" 128 help 129 Choose this option if you have a 4096 KB (4 MB) ROM chip. 130 131config UBOOT_ROMSIZE_KB_8192 132 bool "8192 KB (8 MB)" 133 help 134 Choose this option if you have a 8192 KB (8 MB) ROM chip. 135 136config UBOOT_ROMSIZE_KB_16384 137 bool "16384 KB (16 MB)" 138 help 139 Choose this option if you have a 16384 KB (16 MB) ROM chip. 140 141endchoice 142 143# Map the config names to an integer (KB). 144config UBOOT_ROMSIZE_KB 145 int 146 default 512 if UBOOT_ROMSIZE_KB_512 147 default 1024 if UBOOT_ROMSIZE_KB_1024 148 default 2048 if UBOOT_ROMSIZE_KB_2048 149 default 4096 if UBOOT_ROMSIZE_KB_4096 150 default 8192 if UBOOT_ROMSIZE_KB_8192 151 default 16384 if UBOOT_ROMSIZE_KB_16384 152 153# Map the config names to a hex value (bytes). 154config ROM_SIZE 155 hex 156 default 0x80000 if UBOOT_ROMSIZE_KB_512 157 default 0x100000 if UBOOT_ROMSIZE_KB_1024 158 default 0x200000 if UBOOT_ROMSIZE_KB_2048 159 default 0x400000 if UBOOT_ROMSIZE_KB_4096 160 default 0x800000 if UBOOT_ROMSIZE_KB_8192 161 default 0xc00000 if UBOOT_ROMSIZE_KB_12288 162 default 0x1000000 if UBOOT_ROMSIZE_KB_16384 163 164config HAVE_INTEL_ME 165 bool "Platform requires Intel Management Engine" 166 help 167 Newer higher-end devices have an Intel Management Engine (ME) 168 which is a very large binary blob (typically 1.5MB) which is 169 required for the platform to work. This enforces a particular 170 SPI flash format. You will need to supply the me.bin file in 171 your board directory. 172 173config X86_RAMTEST 174 bool "Perform a simple RAM test after SDRAM initialisation" 175 help 176 If there is something wrong with SDRAM then the platform will 177 often crash within U-Boot or the kernel. This option enables a 178 very simple RAM test that quickly checks whether the SDRAM seems 179 to work correctly. It is not exhaustive but can save time by 180 detecting obvious failures. 181 182config MARK_GRAPHICS_MEM_WRCOMB 183 bool "Mark graphics memory as write-combining" 184 default n 185 help 186 The graphics performance may increase if the graphics 187 memory is set as write-combining cache type. This option 188 enables marking the graphics memory as write-combining. 189 190menu "Display" 191 192config FRAMEBUFFER_SET_VESA_MODE 193 prompt "Set framebuffer graphics resolution" 194 bool 195 help 196 Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) 197 198choice 199 prompt "framebuffer graphics resolution" 200 default FRAMEBUFFER_VESA_MODE_117 201 depends on FRAMEBUFFER_SET_VESA_MODE 202 help 203 This option sets the resolution used for the coreboot framebuffer (and 204 bootsplash screen). 205 206config FRAMEBUFFER_VESA_MODE_100 207 bool "640x400 256-color" 208 209config FRAMEBUFFER_VESA_MODE_101 210 bool "640x480 256-color" 211 212config FRAMEBUFFER_VESA_MODE_102 213 bool "800x600 16-color" 214 215config FRAMEBUFFER_VESA_MODE_103 216 bool "800x600 256-color" 217 218config FRAMEBUFFER_VESA_MODE_104 219 bool "1024x768 16-color" 220 221config FRAMEBUFFER_VESA_MODE_105 222 bool "1024x7686 256-color" 223 224config FRAMEBUFFER_VESA_MODE_106 225 bool "1280x1024 16-color" 226 227config FRAMEBUFFER_VESA_MODE_107 228 bool "1280x1024 256-color" 229 230config FRAMEBUFFER_VESA_MODE_108 231 bool "80x60 text" 232 233config FRAMEBUFFER_VESA_MODE_109 234 bool "132x25 text" 235 236config FRAMEBUFFER_VESA_MODE_10A 237 bool "132x43 text" 238 239config FRAMEBUFFER_VESA_MODE_10B 240 bool "132x50 text" 241 242config FRAMEBUFFER_VESA_MODE_10C 243 bool "132x60 text" 244 245config FRAMEBUFFER_VESA_MODE_10D 246 bool "320x200 32k-color (1:5:5:5)" 247 248config FRAMEBUFFER_VESA_MODE_10E 249 bool "320x200 64k-color (5:6:5)" 250 251config FRAMEBUFFER_VESA_MODE_10F 252 bool "320x200 16.8M-color (8:8:8)" 253 254config FRAMEBUFFER_VESA_MODE_110 255 bool "640x480 32k-color (1:5:5:5)" 256 257config FRAMEBUFFER_VESA_MODE_111 258 bool "640x480 64k-color (5:6:5)" 259 260config FRAMEBUFFER_VESA_MODE_112 261 bool "640x480 16.8M-color (8:8:8)" 262 263config FRAMEBUFFER_VESA_MODE_113 264 bool "800x600 32k-color (1:5:5:5)" 265 266config FRAMEBUFFER_VESA_MODE_114 267 bool "800x600 64k-color (5:6:5)" 268 269config FRAMEBUFFER_VESA_MODE_115 270 bool "800x600 16.8M-color (8:8:8)" 271 272config FRAMEBUFFER_VESA_MODE_116 273 bool "1024x768 32k-color (1:5:5:5)" 274 275config FRAMEBUFFER_VESA_MODE_117 276 bool "1024x768 64k-color (5:6:5)" 277 278config FRAMEBUFFER_VESA_MODE_118 279 bool "1024x768 16.8M-color (8:8:8)" 280 281config FRAMEBUFFER_VESA_MODE_119 282 bool "1280x1024 32k-color (1:5:5:5)" 283 284config FRAMEBUFFER_VESA_MODE_11A 285 bool "1280x1024 64k-color (5:6:5)" 286 287config FRAMEBUFFER_VESA_MODE_11B 288 bool "1280x1024 16.8M-color (8:8:8)" 289 290config FRAMEBUFFER_VESA_MODE_USER 291 bool "Manually select VESA mode" 292 293endchoice 294 295# Map the config names to an integer (KB). 296config FRAMEBUFFER_VESA_MODE 297 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER 298 hex 299 default 0x100 if FRAMEBUFFER_VESA_MODE_100 300 default 0x101 if FRAMEBUFFER_VESA_MODE_101 301 default 0x102 if FRAMEBUFFER_VESA_MODE_102 302 default 0x103 if FRAMEBUFFER_VESA_MODE_103 303 default 0x104 if FRAMEBUFFER_VESA_MODE_104 304 default 0x105 if FRAMEBUFFER_VESA_MODE_105 305 default 0x106 if FRAMEBUFFER_VESA_MODE_106 306 default 0x107 if FRAMEBUFFER_VESA_MODE_107 307 default 0x108 if FRAMEBUFFER_VESA_MODE_108 308 default 0x109 if FRAMEBUFFER_VESA_MODE_109 309 default 0x10A if FRAMEBUFFER_VESA_MODE_10A 310 default 0x10B if FRAMEBUFFER_VESA_MODE_10B 311 default 0x10C if FRAMEBUFFER_VESA_MODE_10C 312 default 0x10D if FRAMEBUFFER_VESA_MODE_10D 313 default 0x10E if FRAMEBUFFER_VESA_MODE_10E 314 default 0x10F if FRAMEBUFFER_VESA_MODE_10F 315 default 0x110 if FRAMEBUFFER_VESA_MODE_110 316 default 0x111 if FRAMEBUFFER_VESA_MODE_111 317 default 0x112 if FRAMEBUFFER_VESA_MODE_112 318 default 0x113 if FRAMEBUFFER_VESA_MODE_113 319 default 0x114 if FRAMEBUFFER_VESA_MODE_114 320 default 0x115 if FRAMEBUFFER_VESA_MODE_115 321 default 0x116 if FRAMEBUFFER_VESA_MODE_116 322 default 0x117 if FRAMEBUFFER_VESA_MODE_117 323 default 0x118 if FRAMEBUFFER_VESA_MODE_118 324 default 0x119 if FRAMEBUFFER_VESA_MODE_119 325 default 0x11A if FRAMEBUFFER_VESA_MODE_11A 326 default 0x11B if FRAMEBUFFER_VESA_MODE_11B 327 default 0x117 if FRAMEBUFFER_VESA_MODE_USER 328 329endmenu 330 331config HAVE_FSP 332 bool "Add an Firmware Support Package binary" 333 help 334 Select this option to add an Firmware Support Package binary to 335 the resulting U-Boot image. It is a binary blob which U-Boot uses 336 to set up SDRAM and other chipset specific initialization. 337 338 Note: Without this binary U-Boot will not be able to set up its 339 SDRAM so will not boot. 340 341config FSP_FILE 342 string "Firmware Support Package binary filename" 343 depends on HAVE_FSP 344 default "fsp.bin" 345 help 346 The filename of the file to use as Firmware Support Package binary 347 in the board directory. 348 349config FSP_ADDR 350 hex "Firmware Support Package binary location" 351 depends on HAVE_FSP 352 default 0xfffc0000 353 help 354 FSP is not Position Independent Code (PIC) and the whole FSP has to 355 be rebased if it is placed at a location which is different from the 356 perferred base address specified during the FSP build. Use Intel's 357 Binary Configuration Tool (BCT) to do the rebase. 358 359 The default base address of 0xfffc0000 indicates that the binary must 360 be located at offset 0xc0000 from the beginning of a 1MB flash device. 361 362config FSP_TEMP_RAM_ADDR 363 hex 364 default 0x2000000 365 help 366 Stack top address which is used in FspInit after DRAM is ready and 367 CAR is disabled. 368 369config MAX_CPUS 370 int "Maximum number of CPUs permitted" 371 default 4 372 help 373 When using multi-CPU chips it is possible for U-Boot to start up 374 more than one CPU. The stack memory used by all of these CPUs is 375 pre-allocated so at present U-Boot wants to know the maximum 376 number of CPUs that may be present. Set this to at least as high 377 as the number of CPUs in your system (it uses about 4KB of RAM for 378 each CPU). 379 380config SMP 381 bool "Enable Symmetric Multiprocessing" 382 default n 383 help 384 Enable use of more than one CPU in U-Boot and the Operating System 385 when loaded. Each CPU will be started up and information can be 386 obtained using the 'cpu' command. If this option is disabled, then 387 only one CPU will be enabled regardless of the number of CPUs 388 available. 389 390config AP_STACK_SIZE 391 hex 392 default 0x1000 393 help 394 Each additional CPU started by U-Boot requires its own stack. This 395 option sets the stack size used by each CPU and directly affects 396 the memory used by this initialisation process. Typically 4KB is 397 enough space. 398 399config TSC_CALIBRATION_BYPASS 400 bool "Bypass Time-Stamp Counter (TSC) calibration" 401 default n 402 help 403 By default U-Boot automatically calibrates Time-Stamp Counter (TSC) 404 running frequency via Model-Specific Register (MSR) and Programmable 405 Interval Timer (PIT). If the calibration does not work on your board, 406 select this option and provide a hardcoded TSC running frequency with 407 CONFIG_TSC_FREQ_IN_MHZ below. 408 409 Normally this option should be turned on in a simulation environment 410 like qemu. 411 412config TSC_FREQ_IN_MHZ 413 int "Time-Stamp Counter (TSC) running frequency in MHz" 414 depends on TSC_CALIBRATION_BYPASS 415 default 1000 416 help 417 The running frequency in MHz of Time-Stamp Counter (TSC). 418 419menu "System tables" 420 421config GENERATE_PIRQ_TABLE 422 bool "Generate a PIRQ table" 423 default n 424 help 425 Generate a PIRQ routing table for this board. The PIRQ routing table 426 is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 427 at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 428 It specifies the interrupt router information as well how all the PCI 429 devices' interrupt pins are wired to PIRQs. 430 431config GENERATE_SFI_TABLE 432 bool "Generate a SFI (Simple Firmware Interface) table" 433 help 434 The Simple Firmware Interface (SFI) provides a lightweight method 435 for platform firmware to pass information to the operating system 436 via static tables in memory. Kernel SFI support is required to 437 boot on SFI-only platforms. If you have ACPI tables then these are 438 used instead. 439 440 U-Boot writes this table in write_sfi_table() just before booting 441 the OS. 442 443 For more information, see http://simplefirmware.org 444 445endmenu 446 447config MAX_PIRQ_LINKS 448 int 449 default 8 450 help 451 This variable specifies the number of PIRQ interrupt links which are 452 routable. On most older chipsets, this is 4, PIRQA through PIRQD. 453 Some newer chipsets offer more than four links, commonly up to PIRQH. 454 455config IRQ_SLOT_COUNT 456 int 457 default 128 458 help 459 U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 460 which in turns forms a table of exact 4KiB. The default value 128 461 should be enough for most boards. If this does not fit your board, 462 change it according to your needs. 463 464config PCIE_ECAM_BASE 465 hex 466 default 0xe0000000 467 help 468 This is the memory-mapped address of PCI configuration space, which 469 is only available through the Enhanced Configuration Access 470 Mechanism (ECAM) with PCI Express. It can be set up almost 471 anywhere. Before it is set up, it is possible to access PCI 472 configuration space through I/O access, but memory access is more 473 convenient. Using this, PCI can be scanned and configured. This 474 should be set to a region that does not conflict with memory 475 assigned to PCI devices - i.e. the memory and prefetch regions, as 476 passed to pci_set_region(). 477 478config BOOTSTAGE 479 default y 480 481config BOOTSTAGE_REPORT 482 default y 483 484config CMD_BOOTSTAGE 485 default y 486 487endmenu 488