xref: /openbmc/u-boot/arch/sh/lib/udiv_qrnnd.S (revision 20c700f8)
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2   2004, 2005, 2006
3   Free Software Foundation, Inc.
4
5 * SPDX-License-Identifier:	GPL-2.0+
6 */
7
8!! libgcc routines for the Renesas / SuperH SH CPUs.
9!! Contributed by Steve Chamberlain.
10!! sac@cygnus.com
11
12!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
13!! recoded in assembly by Toshiyasu Morita
14!! tm@netcom.com
15
16/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
17   ELF local label prefixes by J"orn Rennecke
18   amylaar@cygnus.com  */
19
20	/* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
21	/* n1 < d, but n1 might be larger than d1.  */
22	.global __udiv_qrnnd_16
23	.balign 8
24__udiv_qrnnd_16:
25	div0u
26	cmp/hi r6,r0
27	bt .Lots
28	.rept 16
29	div1 r6,r0
30	.endr
31	extu.w r0,r1
32	bt 0f
33	add r6,r0
340:	rotcl r1
35	mulu.w r1,r5
36	xtrct r4,r0
37	swap.w r0,r0
38	sts macl,r2
39	cmp/hs r2,r0
40	sub r2,r0
41	bt 0f
42	addc r5,r0
43	add #-1,r1
44	bt 0f
451:	add #-1,r1
46	rts
47	add r5,r0
48	.balign 8
49.Lots:
50	sub r5,r0
51	swap.w r4,r1
52	xtrct r0,r1
53	clrt
54	mov r1,r0
55	addc r5,r0
56	mov #-1,r1
57	bf/s 1b
58	 shlr16 r1
590:	rts
60	nop
61