xref: /openbmc/u-boot/arch/sh/lib/time.c (revision 4611d5ba)
1 /*
2  * (C) Copyright 2009
3  * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4  *
5  * (C) Copyright 2007-2012
6  * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
7  *
8  * (C) Copyright 2003
9  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 #include <common.h>
15 #include <asm/processor.h>
16 #include <asm/io.h>
17 #include <sh_tmu.h>
18 
19 #define TCR_TPSC 0x07
20 
21 static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
22 
23 unsigned long get_tbclk(void)
24 {
25 	u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
26 	return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2);
27 }
28 
29 unsigned long timer_read_counter(void)
30 {
31 	return ~readl(&tmu->tcnt0);
32 }
33 
34 static void tmu_timer_start(unsigned int timer)
35 {
36 	if (timer > 2)
37 		return;
38 	writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr);
39 }
40 
41 static void tmu_timer_stop(unsigned int timer)
42 {
43 	if (timer > 2)
44 		return;
45 	writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr);
46 }
47 
48 int timer_init(void)
49 {
50 	u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
51 	writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0);
52 
53 	tmu_timer_stop(0);
54 	tmu_timer_start(0);
55 
56 	return 0;
57 }
58 
59