xref: /openbmc/u-boot/arch/sh/include/asm/cpu_sh7763.h (revision dd1033e4)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2008 Renesas Solutions Corp.
4  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
5  */
6 #ifndef _ASM_CPU_SH7763_H_
7 #define _ASM_CPU_SH7763_H_
8 
9 /* CACHE */
10 #define CACHE_OC_NUM_WAYS	1
11 #define CCR				0xFF00001C
12 #define CCR_CACHE_INIT	0x0000090b
13 
14 /* SCIF */
15 /* SCIF0 */
16 #define SCIF0_BASE	SCSMR0
17 #define SCSMR0		0xFFE00000
18 
19 /* SCIF1 */
20 #define SCIF1_BASE	SCSMR1
21 #define SCSMR1		0xFFE08000
22 
23 /* SCIF2 */
24 #define SCIF2_BASE	SCSMR2
25 #define SCSMR2		0xFFE10000
26 
27 /* Watchdog Timer */
28 #define WTCNT		WDTST
29 #define WDTST		0xFFCC0000
30 
31 /* TMU */
32 #define TMU_BASE	0xFFD80000
33 
34 #endif /* _ASM_CPU_SH7763_H_ */
35