xref: /openbmc/u-boot/arch/sh/include/asm/cpu_sh7763.h (revision 441cac10)
1 /*
2  * Copyright (C) 2008 Renesas Solutions Corp.
3  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA
19  */
20 #ifndef _ASM_CPU_SH7763_H_
21 #define _ASM_CPU_SH7763_H_
22 
23 /* CACHE */
24 #define CACHE_OC_NUM_WAYS	1
25 #define CCR				0xFF00001C
26 #define CCR_CACHE_INIT	0x0000090b
27 
28 /* SCIF */
29 /* SCIF0 */
30 #define SCIF0_BASE	SCSMR0
31 #define SCSMR0		0xFFE00000
32 
33 /* SCIF1 */
34 #define SCIF1_BASE	SCSMR1
35 #define SCSMR1		0xFFE08000
36 
37 /* SCIF2 */
38 #define SCIF2_BASE	SCSMR2
39 #define SCSMR2		0xFFE10000
40 
41 /* Watchdog Timer */
42 #define WTCNT		WDTST
43 #define WDTST		0xFFCC0000
44 
45 /* TMU */
46 #define TSTR		0xFFD80004
47 #define TCOR0		0xFFD80008
48 #define TCNT0		0xFFD8000C
49 #define TCR0		0xFFD80010
50 
51 #endif /* _ASM_CPU_SH7763_H_ */
52