xref: /openbmc/u-boot/arch/sh/include/asm/cpu_sh7763.h (revision 0b304a24)
1 /*
2  * Copyright (C) 2008 Renesas Solutions Corp.
3  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 #ifndef _ASM_CPU_SH7763_H_
8 #define _ASM_CPU_SH7763_H_
9 
10 /* CACHE */
11 #define CACHE_OC_NUM_WAYS	1
12 #define CCR				0xFF00001C
13 #define CCR_CACHE_INIT	0x0000090b
14 
15 /* SCIF */
16 /* SCIF0 */
17 #define SCIF0_BASE	SCSMR0
18 #define SCSMR0		0xFFE00000
19 
20 /* SCIF1 */
21 #define SCIF1_BASE	SCSMR1
22 #define SCSMR1		0xFFE08000
23 
24 /* SCIF2 */
25 #define SCIF2_BASE	SCSMR2
26 #define SCSMR2		0xFFE10000
27 
28 /* Watchdog Timer */
29 #define WTCNT		WDTST
30 #define WDTST		0xFFCC0000
31 
32 /* TMU */
33 #define TMU_BASE	0xFFD80000
34 
35 #endif /* _ASM_CPU_SH7763_H_ */
36