xref: /openbmc/u-boot/arch/sh/include/asm/cpu_sh3.h (revision 88dc4099)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2007-2009 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
4  * (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
5  */
6 
7 #ifndef _ASM_CPU_SH3_H_
8 #define _ASM_CPU_SH3_H_
9 
10 /* cache control */
11 #define CCR_CACHE_STOP   0x00000008
12 #define CCR_CACHE_ENABLE 0x00000005
13 #define CCR_CACHE_ICI    0x00000008
14 
15 #define CACHE_OC_ADDRESS_ARRAY	0xf0000000
16 #define CACHE_OC_WAY_SHIFT	13
17 #define CACHE_OC_NUM_ENTRIES	256
18 #define CACHE_OC_ENTRY_SHIFT	4
19 
20 #if defined(CONFIG_CPU_SH7706)
21 #include <asm/cpu_sh7706.h>
22 #elif defined(CONFIG_CPU_SH7710)
23 #include <asm/cpu_sh7710.h>
24 #elif defined(CONFIG_CPU_SH7720)
25 #include <asm/cpu_sh7720.h>
26 #else
27 #error "Unknown SH3 variant"
28 #endif
29 
30 #endif	/* _ASM_CPU_SH3_H_ */
31