xref: /openbmc/u-boot/arch/sh/include/asm/cpu_sh3.h (revision 274bced8)
1 /*
2  * (C) Copyright 2007-2009 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3  * (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _ASM_CPU_SH3_H_
9 #define _ASM_CPU_SH3_H_
10 
11 /* cache control */
12 #define CCR_CACHE_STOP   0x00000008
13 #define CCR_CACHE_ENABLE 0x00000005
14 #define CCR_CACHE_ICI    0x00000008
15 
16 #define CACHE_OC_ADDRESS_ARRAY	0xf0000000
17 #define CACHE_OC_WAY_SHIFT	13
18 #define CACHE_OC_NUM_ENTRIES	256
19 #define CACHE_OC_ENTRY_SHIFT	4
20 
21 #if defined(CONFIG_CPU_SH7706)
22 #include <asm/cpu_sh7706.h>
23 #elif defined(CONFIG_CPU_SH7710)
24 #include <asm/cpu_sh7710.h>
25 #elif defined(CONFIG_CPU_SH7720)
26 #include <asm/cpu_sh7720.h>
27 #else
28 #error "Unknown SH3 variant"
29 #endif
30 
31 #endif	/* _ASM_CPU_SH3_H_ */
32