xref: /openbmc/u-boot/arch/sh/cpu/sh4/watchdog.c (revision 8729d582)
1 /*
2  * SPDX-License-Identifier:	GPL-2.0+
3  */
4 
5 #include <common.h>
6 #include <asm/processor.h>
7 #include <asm/system.h>
8 #include <asm/io.h>
9 
10 #define WDT_BASE	WTCNT
11 
12 #define WDT_WD		(1 << 6)
13 #define WDT_RST_P	(0)
14 #define WDT_RST_M	(1 << 5)
15 #define WDT_ENABLE	(1 << 7)
16 
17 #if defined(CONFIG_WATCHDOG)
18 static unsigned char csr_read(void)
19 {
20 	return inb(WDT_BASE + 0x04);
21 }
22 
23 static void cnt_write(unsigned char value)
24 {
25 	outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
26 }
27 
28 static void csr_write(unsigned char value)
29 {
30 	outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
31 }
32 
33 void watchdog_reset(void)
34 {
35 	outl(0x55000000, WDT_BASE + 0x08);
36 }
37 
38 int watchdog_init(void)
39 {
40 	/* Set overflow time*/
41 	cnt_write(0);
42 	/* Power on reset */
43 	csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);
44 
45 	return 0;
46 }
47 
48 int watchdog_disable(void)
49 {
50 	csr_write(csr_read() & ~WDT_ENABLE);
51 	return 0;
52 }
53 #endif
54 
55 void reset_cpu(unsigned long ignored)
56 {
57 	/* Address error with SR.BL=1 first. */
58 	trigger_address_error();
59 
60 	while (1)
61 		;
62 }
63