xref: /openbmc/u-boot/arch/sh/cpu/sh4/watchdog.c (revision 441cac10)
1 /*
2  * This program is free software; you can redistribute it and/or
3  * modify it under the terms of the GNU General Public License as
4  * published by the Free Software Foundation; either version 2 of
5  * the License, or (at your option) any later version.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
15  * MA 02111-1307 USA
16  */
17 
18 #include <common.h>
19 #include <asm/processor.h>
20 #include <asm/io.h>
21 
22 #define WDT_BASE	WTCNT
23 
24 #define WDT_WD		(1 << 6)
25 #define WDT_RST_P	(0)
26 #define WDT_RST_M	(1 << 5)
27 #define WDT_ENABLE	(1 << 7)
28 
29 #if defined(CONFIG_WATCHDOG)
30 static unsigned char csr_read(void)
31 {
32 	return inb(WDT_BASE + 0x04);
33 }
34 
35 static void cnt_write(unsigned char value)
36 {
37 	outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
38 }
39 
40 static void csr_write(unsigned char value)
41 {
42 	outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
43 }
44 
45 void watchdog_reset(void)
46 {
47 	outl(0x55000000, WDT_BASE + 0x08);
48 }
49 
50 int watchdog_init(void)
51 {
52 	/* Set overflow time*/
53 	cnt_write(0);
54 	/* Power on reset */
55 	csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);
56 
57 	return 0;
58 }
59 
60 int watchdog_disable(void)
61 {
62 	csr_write(csr_read() & ~WDT_ENABLE);
63 	return 0;
64 }
65 #endif
66 
67 void reset_cpu(unsigned long ignored)
68 {
69 	while (1)
70 		;
71 }
72