xref: /openbmc/u-boot/arch/sh/cpu/sh2/cpu.c (revision e5841e12)
1 /*
2  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3  * Copyright (C) 2008 Renesas Solutions Corp.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 #include <common.h>
25 #include <command.h>
26 #include <asm/processor.h>
27 #include <asm/io.h>
28 
29 #define STBCR4      0xFFFE040C
30 #define cmt_clock_enable() do {\
31 		writeb(readb(STBCR4) & ~0x04, STBCR4);\
32 	} while (0)
33 #define scif0_enable() do {\
34 		writeb(readb(STBCR4) & ~0x80, STBCR4);\
35 	} while (0)
36 #define scif3_enable() do {\
37 		writeb(readb(STBCR4) & ~0x10, STBCR4);\
38 	} while (0)
39 
40 int checkcpu(void)
41 {
42 #if defined(CONFIG_SH2A)
43 	puts("CPU: SH2A\n");
44 #else
45 	puts("CPU: SH2\n");
46 #endif
47 	return 0;
48 }
49 
50 int cpu_init(void)
51 {
52 	/* SCIF enable */
53 #if defined(CONFIG_CONS_SCIF3)
54 	scif3_enable();
55 #else
56 	scif0_enable();
57 #endif
58 	/* CMT clock enable */
59 	cmt_clock_enable() ;
60 	return 0;
61 }
62 
63 int cleanup_before_linux(void)
64 {
65 	disable_interrupts();
66 	return 0;
67 }
68 
69 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
70 {
71 	disable_interrupts();
72 	reset_cpu(0);
73 	return 0;
74 }
75 
76 void flush_cache(unsigned long addr, unsigned long size)
77 {
78 
79 }
80 
81 void icache_enable(void)
82 {
83 }
84 
85 void icache_disable(void)
86 {
87 }
88 
89 int icache_status(void)
90 {
91 	return 0;
92 }
93 
94 void dcache_enable(void)
95 {
96 }
97 
98 void dcache_disable(void)
99 {
100 }
101 
102 int dcache_status(void)
103 {
104 	return 0;
105 }
106