1 /* 2 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 3 * Copyright (C) 2008 Renesas Solutions Corp. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <command.h> 10 #include <asm/processor.h> 11 #include <asm/io.h> 12 13 #define STBCR4 0xFFFE040C 14 #define cmt_clock_enable() do {\ 15 writeb(readb(STBCR4) & ~0x04, STBCR4);\ 16 } while (0) 17 #define scif0_enable() do {\ 18 writeb(readb(STBCR4) & ~0x80, STBCR4);\ 19 } while (0) 20 #define scif3_enable() do {\ 21 writeb(readb(STBCR4) & ~0x10, STBCR4);\ 22 } while (0) 23 24 int checkcpu(void) 25 { 26 #if defined(CONFIG_SH2A) 27 puts("CPU: SH2A\n"); 28 #else 29 puts("CPU: SH2\n"); 30 #endif 31 return 0; 32 } 33 34 int cpu_init(void) 35 { 36 /* SCIF enable */ 37 #if defined(CONFIG_CONS_SCIF3) 38 scif3_enable(); 39 #else 40 scif0_enable(); 41 #endif 42 /* CMT clock enable */ 43 cmt_clock_enable() ; 44 return 0; 45 } 46 47 int cleanup_before_linux(void) 48 { 49 disable_interrupts(); 50 return 0; 51 } 52 53 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 54 { 55 disable_interrupts(); 56 reset_cpu(0); 57 return 0; 58 } 59 60 void flush_cache(unsigned long addr, unsigned long size) 61 { 62 63 } 64 65 void icache_enable(void) 66 { 67 } 68 69 void icache_disable(void) 70 { 71 } 72 73 int icache_status(void) 74 { 75 return 0; 76 } 77 78 void dcache_enable(void) 79 { 80 } 81 82 void dcache_disable(void) 83 { 84 } 85 86 int dcache_status(void) 87 { 88 return 0; 89 } 90