1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Test-related constants for sandbox 4 * 5 * Copyright (c) 2014 Google, Inc 6 */ 7 8 #ifndef __ASM_TEST_H 9 #define __ASM_TEST_H 10 11 /* The sandbox driver always permits an I2C device with this address */ 12 #define SANDBOX_I2C_TEST_ADDR 0x59 13 14 #define SANDBOX_PCI_VENDOR_ID 0x1234 15 #define SANDBOX_PCI_DEVICE_ID 0x5678 16 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM 17 #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL 18 19 #define PCI_CAP_ID_PM_OFFSET 0x50 20 #define PCI_CAP_ID_EXP_OFFSET 0x60 21 #define PCI_CAP_ID_MSIX_OFFSET 0x70 22 23 #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100 24 #define PCI_EXT_CAP_ID_VC_OFFSET 0x200 25 #define PCI_EXT_CAP_ID_DSN_OFFSET 0x300 26 27 /* Useful for PCI_VDEVICE() macro */ 28 #define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID 29 #define SWAP_CASE_DRV_DATA 0x55aa 30 31 #define SANDBOX_CLK_RATE 32768 32 33 /* System controller driver data */ 34 enum { 35 SYSCON0 = 32, 36 SYSCON1, 37 38 SYSCON_COUNT 39 }; 40 41 /** 42 * sandbox_i2c_set_test_mode() - set test mode for running unit tests 43 * 44 * See sandbox_i2c_xfer() for the behaviour changes. 45 * 46 * @bus: sandbox I2C bus to adjust 47 * @test_mode: true to select test mode, false to run normally 48 */ 49 void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode); 50 51 enum sandbox_i2c_eeprom_test_mode { 52 SIE_TEST_MODE_NONE, 53 /* Permits read/write of only one byte per I2C transaction */ 54 SIE_TEST_MODE_SINGLE_BYTE, 55 }; 56 57 void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, 58 enum sandbox_i2c_eeprom_test_mode mode); 59 60 void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len); 61 62 /* 63 * sandbox_timer_add_offset() 64 * 65 * Allow tests to add to the time reported through lib/time.c functions 66 * offset: number of milliseconds to advance the system time 67 */ 68 void sandbox_timer_add_offset(unsigned long offset); 69 70 /** 71 * sandbox_i2c_rtc_set_offset() - set the time offset from system/base time 72 * 73 * @dev: RTC device to adjust 74 * @use_system_time: true to use system time, false to use @base_time 75 * @offset: RTC offset from current system/base time (-1 for no 76 * change) 77 * @return old value of RTC offset 78 */ 79 long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time, 80 int offset); 81 82 /** 83 * sandbox_i2c_rtc_get_set_base_time() - get and set the base time 84 * 85 * @dev: RTC device to adjust 86 * @base_time: New base system time (set to -1 for no change) 87 * @return old base time 88 */ 89 long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time); 90 91 int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str); 92 93 /** 94 * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD 95 * 96 * @dev: OSD device for which to access the internal memory for 97 * @buf: pointer to buffer to receive the OSD memory data 98 * @buflen: length of buffer in bytes 99 */ 100 int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen); 101 102 /** 103 * sandbox_pwm_get_config() - get the PWM config for a channel 104 * 105 * @dev: Device to check 106 * @channel: Channel number to check 107 * @period_ns: Period of the PWM in nanoseconds 108 * @duty_ns: Current duty cycle of the PWM in nanoseconds 109 * @enable: true if the PWM is enabled 110 * @polarity: true if the PWM polarity is active high 111 * @return 0 if OK, -ENOSPC if the PWM number is invalid 112 */ 113 int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, 114 uint *duty_nsp, bool *enablep, bool *polarityp); 115 116 #endif 117