1/dts-v1/; 2 3/ { 4 model = "sandbox"; 5 compatible = "sandbox"; 6 #address-cells = <1>; 7 #size-cells = <1>; 8 9 aliases { 10 console = &uart0; 11 eth0 = "/eth@10002000"; 12 eth3 = ð_3; 13 eth5 = ð_5; 14 gpio1 = &gpio_a; 15 gpio2 = &gpio_b; 16 i2c0 = "/i2c@0"; 17 mmc0 = "/mmc0"; 18 mmc1 = "/mmc1"; 19 pci0 = &pci0; 20 pci1 = &pci1; 21 pci2 = &pci2; 22 remoteproc1 = &rproc_1; 23 remoteproc2 = &rproc_2; 24 rtc0 = &rtc_0; 25 rtc1 = &rtc_1; 26 spi0 = "/spi@0"; 27 testfdt6 = "/e-test"; 28 testbus3 = "/some-bus"; 29 testfdt0 = "/some-bus/c-test@0"; 30 testfdt1 = "/some-bus/c-test@1"; 31 testfdt3 = "/b-test"; 32 testfdt5 = "/some-bus/c-test@5"; 33 testfdt8 = "/a-test"; 34 fdt-dummy0 = "/translation-test@8000/dev@0,0"; 35 fdt-dummy1 = "/translation-test@8000/dev@1,100"; 36 fdt-dummy2 = "/translation-test@8000/dev@2,200"; 37 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; 38 usb0 = &usb_0; 39 usb1 = &usb_1; 40 usb2 = &usb_2; 41 axi0 = &axi; 42 osd0 = "/osd"; 43 }; 44 45 cros_ec: cros-ec { 46 reg = <0 0>; 47 compatible = "google,cros-ec-sandbox"; 48 49 /* 50 * This describes the flash memory within the EC. Note 51 * that the STM32L flash erases to 0, not 0xff. 52 */ 53 flash { 54 image-pos = <0x08000000>; 55 size = <0x20000>; 56 erase-value = <0>; 57 58 /* Information for sandbox */ 59 ro { 60 image-pos = <0>; 61 size = <0xf000>; 62 }; 63 wp-ro { 64 image-pos = <0xf000>; 65 size = <0x1000>; 66 }; 67 rw { 68 image-pos = <0x10000>; 69 size = <0x10000>; 70 }; 71 }; 72 }; 73 74 a-test { 75 reg = <0 1>; 76 compatible = "denx,u-boot-fdt-test"; 77 ping-expect = <0>; 78 ping-add = <0>; 79 u-boot,dm-pre-reloc; 80 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>, 81 <0>, <&gpio_a 12>; 82 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>, 83 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>, 84 <&gpio_b 9 0xc 3 2 1>; 85 }; 86 87 junk { 88 reg = <1 1>; 89 compatible = "not,compatible"; 90 }; 91 92 no-compatible { 93 reg = <2 1>; 94 }; 95 96 backlight: backlight { 97 compatible = "pwm-backlight"; 98 enable-gpios = <&gpio_a 1>; 99 power-supply = <&ldo_1>; 100 pwms = <&pwm 0 1000>; 101 default-brightness-level = <5>; 102 brightness-levels = <0 16 32 64 128 170 202 234 255>; 103 }; 104 105 bind-test { 106 bind-test-child1 { 107 compatible = "sandbox,phy"; 108 #phy-cells = <1>; 109 }; 110 111 bind-test-child2 { 112 compatible = "simple-bus"; 113 }; 114 }; 115 116 b-test { 117 reg = <3 1>; 118 compatible = "denx,u-boot-fdt-test"; 119 ping-expect = <3>; 120 ping-add = <3>; 121 }; 122 123 phy_provider0: gen_phy@0 { 124 compatible = "sandbox,phy"; 125 #phy-cells = <1>; 126 }; 127 128 phy_provider1: gen_phy@1 { 129 compatible = "sandbox,phy"; 130 #phy-cells = <0>; 131 broken; 132 }; 133 134 gen_phy_user: gen_phy_user { 135 compatible = "simple-bus"; 136 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; 137 phy-names = "phy1", "phy2", "phy3"; 138 }; 139 140 some-bus { 141 #address-cells = <1>; 142 #size-cells = <0>; 143 compatible = "denx,u-boot-test-bus"; 144 reg = <3 1>; 145 ping-expect = <4>; 146 ping-add = <4>; 147 c-test@5 { 148 compatible = "denx,u-boot-fdt-test"; 149 reg = <5>; 150 ping-expect = <5>; 151 ping-add = <5>; 152 }; 153 c-test@0 { 154 compatible = "denx,u-boot-fdt-test"; 155 reg = <0>; 156 ping-expect = <6>; 157 ping-add = <6>; 158 }; 159 c-test@1 { 160 compatible = "denx,u-boot-fdt-test"; 161 reg = <1>; 162 ping-expect = <7>; 163 ping-add = <7>; 164 }; 165 }; 166 167 d-test { 168 reg = <3 1>; 169 ping-expect = <6>; 170 ping-add = <6>; 171 compatible = "google,another-fdt-test"; 172 }; 173 174 e-test { 175 reg = <3 1>; 176 ping-expect = <6>; 177 ping-add = <6>; 178 compatible = "google,another-fdt-test"; 179 }; 180 181 f-test { 182 compatible = "denx,u-boot-fdt-test"; 183 }; 184 185 g-test { 186 compatible = "denx,u-boot-fdt-test"; 187 }; 188 189 clocks { 190 clk_fixed: clk-fixed { 191 compatible = "fixed-clock"; 192 #clock-cells = <0>; 193 clock-frequency = <1234>; 194 }; 195 }; 196 197 clk_sandbox: clk-sbox { 198 compatible = "sandbox,clk"; 199 #clock-cells = <1>; 200 }; 201 202 clk-test { 203 compatible = "sandbox,clk-test"; 204 clocks = <&clk_fixed>, 205 <&clk_sandbox 1>, 206 <&clk_sandbox 0>; 207 clock-names = "fixed", "i2c", "spi"; 208 }; 209 210 eth@10002000 { 211 compatible = "sandbox,eth"; 212 reg = <0x10002000 0x1000>; 213 fake-host-hwaddr = [00 00 66 44 22 00]; 214 }; 215 216 eth_5: eth@10003000 { 217 compatible = "sandbox,eth"; 218 reg = <0x10003000 0x1000>; 219 fake-host-hwaddr = [00 00 66 44 22 11]; 220 }; 221 222 eth_3: sbe5 { 223 compatible = "sandbox,eth"; 224 reg = <0x10005000 0x1000>; 225 fake-host-hwaddr = [00 00 66 44 22 33]; 226 }; 227 228 eth@10004000 { 229 compatible = "sandbox,eth"; 230 reg = <0x10004000 0x1000>; 231 fake-host-hwaddr = [00 00 66 44 22 22]; 232 }; 233 234 firmware { 235 sandbox_firmware: sandbox-firmware { 236 compatible = "sandbox,firmware"; 237 }; 238 }; 239 240 gpio_a: base-gpios { 241 compatible = "sandbox,gpio"; 242 gpio-controller; 243 #gpio-cells = <1>; 244 gpio-bank-name = "a"; 245 sandbox,gpio-count = <20>; 246 }; 247 248 gpio_b: extra-gpios { 249 compatible = "sandbox,gpio"; 250 gpio-controller; 251 #gpio-cells = <5>; 252 gpio-bank-name = "b"; 253 sandbox,gpio-count = <10>; 254 }; 255 256 i2c@0 { 257 #address-cells = <1>; 258 #size-cells = <0>; 259 reg = <0 1>; 260 compatible = "sandbox,i2c"; 261 clock-frequency = <100000>; 262 eeprom@2c { 263 reg = <0x2c>; 264 compatible = "i2c-eeprom"; 265 emul { 266 compatible = "sandbox,i2c-eeprom"; 267 sandbox,filename = "i2c.bin"; 268 sandbox,size = <256>; 269 }; 270 }; 271 272 rtc_0: rtc@43 { 273 reg = <0x43>; 274 compatible = "sandbox-rtc"; 275 emul { 276 compatible = "sandbox,i2c-rtc"; 277 }; 278 }; 279 280 rtc_1: rtc@61 { 281 reg = <0x61>; 282 compatible = "sandbox-rtc"; 283 emul { 284 compatible = "sandbox,i2c-rtc"; 285 }; 286 }; 287 288 sandbox_pmic: sandbox_pmic { 289 reg = <0x40>; 290 }; 291 292 mc34708: pmic@41 { 293 reg = <0x41>; 294 }; 295 }; 296 297 adc@0 { 298 compatible = "sandbox,adc"; 299 vdd-supply = <&buck2>; 300 vss-microvolts = <0>; 301 }; 302 303 lcd { 304 u-boot,dm-pre-reloc; 305 compatible = "sandbox,lcd-sdl"; 306 xres = <1366>; 307 yres = <768>; 308 }; 309 310 leds { 311 compatible = "gpio-leds"; 312 313 iracibble { 314 gpios = <&gpio_a 1 0>; 315 label = "sandbox:red"; 316 }; 317 318 martinet { 319 gpios = <&gpio_a 2 0>; 320 label = "sandbox:green"; 321 }; 322 323 default_on { 324 gpios = <&gpio_a 5 0>; 325 label = "sandbox:default_on"; 326 default-state = "on"; 327 }; 328 329 default_off { 330 gpios = <&gpio_a 6 0>; 331 label = "sandbox:default_off"; 332 default-state = "off"; 333 }; 334 }; 335 336 mbox: mbox { 337 compatible = "sandbox,mbox"; 338 #mbox-cells = <1>; 339 }; 340 341 mbox-test { 342 compatible = "sandbox,mbox-test"; 343 mboxes = <&mbox 100>, <&mbox 1>; 344 mbox-names = "other", "test"; 345 }; 346 347 cpu-test1 { 348 compatible = "sandbox,cpu_sandbox"; 349 }; 350 351 cpu-test2 { 352 compatible = "sandbox,cpu_sandbox"; 353 }; 354 355 cpu-test3 { 356 compatible = "sandbox,cpu_sandbox"; 357 }; 358 359 misc-test { 360 compatible = "sandbox,misc_sandbox"; 361 }; 362 363 mmc2 { 364 compatible = "sandbox,mmc"; 365 }; 366 367 mmc1 { 368 compatible = "sandbox,mmc"; 369 }; 370 371 mmc0 { 372 compatible = "sandbox,mmc"; 373 }; 374 375 pci0: pci-controller0 { 376 compatible = "sandbox,pci"; 377 device_type = "pci"; 378 #address-cells = <3>; 379 #size-cells = <2>; 380 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 381 0x01000000 0 0x20000000 0x20000000 0 0x2000>; 382 pci@0,0 { 383 compatible = "pci-generic"; 384 reg = <0x0000 0 0 0 0>; 385 emul@0,0 { 386 compatible = "sandbox,swap-case"; 387 }; 388 }; 389 pci@1f,0 { 390 compatible = "pci-generic"; 391 reg = <0xf800 0 0 0 0>; 392 emul@1f,0 { 393 compatible = "sandbox,swap-case"; 394 }; 395 }; 396 }; 397 398 pci1: pci-controller1 { 399 compatible = "sandbox,pci"; 400 device_type = "pci"; 401 #address-cells = <3>; 402 #size-cells = <2>; 403 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 404 0x01000000 0 0x40000000 0x40000000 0 0x2000>; 405 sandbox,dev-info = <0x08 0x00 0x1234 0x5678 406 0x0c 0x00 0x1234 0x5678>; 407 }; 408 409 pci2: pci-controller2 { 410 compatible = "sandbox,pci"; 411 device_type = "pci"; 412 #address-cells = <3>; 413 #size-cells = <2>; 414 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 415 0x01000000 0 0x60000000 0x60000000 0 0x2000>; 416 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; 417 pci@1f,0 { 418 compatible = "pci-generic"; 419 reg = <0xf800 0 0 0 0>; 420 emul@1f,0 { 421 compatible = "sandbox,swap-case"; 422 }; 423 }; 424 }; 425 426 probing { 427 compatible = "simple-bus"; 428 test1 { 429 compatible = "denx,u-boot-probe-test"; 430 }; 431 432 test2 { 433 compatible = "denx,u-boot-probe-test"; 434 }; 435 436 test3 { 437 compatible = "denx,u-boot-probe-test"; 438 }; 439 440 test4 { 441 compatible = "denx,u-boot-probe-test"; 442 }; 443 }; 444 445 pwrdom: power-domain { 446 compatible = "sandbox,power-domain"; 447 #power-domain-cells = <1>; 448 }; 449 450 power-domain-test { 451 compatible = "sandbox,power-domain-test"; 452 power-domains = <&pwrdom 2>; 453 }; 454 455 pwm: pwm { 456 compatible = "sandbox,pwm"; 457 #pwm-cells = <2>; 458 }; 459 460 pwm2 { 461 compatible = "sandbox,pwm"; 462 #pwm-cells = <2>; 463 }; 464 465 ram { 466 compatible = "sandbox,ram"; 467 }; 468 469 reset@0 { 470 compatible = "sandbox,warm-reset"; 471 }; 472 473 reset@1 { 474 compatible = "sandbox,reset"; 475 }; 476 477 resetc: reset-ctl { 478 compatible = "sandbox,reset-ctl"; 479 #reset-cells = <1>; 480 }; 481 482 reset-ctl-test { 483 compatible = "sandbox,reset-ctl-test"; 484 resets = <&resetc 100>, <&resetc 2>; 485 reset-names = "other", "test"; 486 }; 487 488 rproc_1: rproc@1 { 489 compatible = "sandbox,test-processor"; 490 remoteproc-name = "remoteproc-test-dev1"; 491 }; 492 493 rproc_2: rproc@2 { 494 compatible = "sandbox,test-processor"; 495 internal-memory-mapped; 496 remoteproc-name = "remoteproc-test-dev2"; 497 }; 498 499 panel { 500 compatible = "simple-panel"; 501 backlight = <&backlight 0 100>; 502 }; 503 504 smem@0 { 505 compatible = "sandbox,smem"; 506 }; 507 508 spi@0 { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 reg = <0 1>; 512 compatible = "sandbox,spi"; 513 cs-gpios = <0>, <&gpio_a 0>; 514 spi.bin@0 { 515 reg = <0>; 516 compatible = "spansion,m25p16", "spi-flash"; 517 spi-max-frequency = <40000000>; 518 sandbox,filename = "spi.bin"; 519 }; 520 }; 521 522 syscon@0 { 523 compatible = "sandbox,syscon0"; 524 reg = <0x10 4>; 525 }; 526 527 syscon@1 { 528 compatible = "sandbox,syscon1"; 529 reg = <0x20 5 530 0x28 6 531 0x30 7 532 0x38 8>; 533 }; 534 535 syscon@2 { 536 compatible = "simple-mfd", "syscon"; 537 reg = <0x40 5 538 0x48 6 539 0x50 7 540 0x58 8>; 541 }; 542 543 timer { 544 compatible = "sandbox,timer"; 545 clock-frequency = <1000000>; 546 }; 547 548 tpm2 { 549 compatible = "sandbox,tpm2"; 550 }; 551 552 uart0: serial { 553 compatible = "sandbox,serial"; 554 u-boot,dm-pre-reloc; 555 }; 556 557 usb_0: usb@0 { 558 compatible = "sandbox,usb"; 559 status = "disabled"; 560 hub { 561 compatible = "sandbox,usb-hub"; 562 #address-cells = <1>; 563 #size-cells = <0>; 564 flash-stick { 565 reg = <0>; 566 compatible = "sandbox,usb-flash"; 567 }; 568 }; 569 }; 570 571 usb_1: usb@1 { 572 compatible = "sandbox,usb"; 573 hub { 574 compatible = "usb-hub"; 575 usb,device-class = <9>; 576 hub-emul { 577 compatible = "sandbox,usb-hub"; 578 #address-cells = <1>; 579 #size-cells = <0>; 580 flash-stick@0 { 581 reg = <0>; 582 compatible = "sandbox,usb-flash"; 583 sandbox,filepath = "testflash.bin"; 584 }; 585 586 flash-stick@1 { 587 reg = <1>; 588 compatible = "sandbox,usb-flash"; 589 sandbox,filepath = "testflash1.bin"; 590 }; 591 592 flash-stick@2 { 593 reg = <2>; 594 compatible = "sandbox,usb-flash"; 595 sandbox,filepath = "testflash2.bin"; 596 }; 597 598 keyb@3 { 599 reg = <3>; 600 compatible = "sandbox,usb-keyb"; 601 }; 602 603 }; 604 }; 605 }; 606 607 usb_2: usb@2 { 608 compatible = "sandbox,usb"; 609 status = "disabled"; 610 }; 611 612 spmi: spmi@0 { 613 compatible = "sandbox,spmi"; 614 #address-cells = <0x1>; 615 #size-cells = <0x1>; 616 pm8916@0 { 617 compatible = "qcom,spmi-pmic"; 618 reg = <0x0 0x1>; 619 #address-cells = <0x1>; 620 #size-cells = <0x1>; 621 622 spmi_gpios: gpios@c000 { 623 compatible = "qcom,pm8916-gpio"; 624 reg = <0xc000 0x400>; 625 gpio-controller; 626 gpio-count = <4>; 627 #gpio-cells = <2>; 628 gpio-bank-name="spmi"; 629 }; 630 }; 631 }; 632 633 wdt0: wdt@0 { 634 compatible = "sandbox,wdt"; 635 }; 636 637 axi: axi@0 { 638 compatible = "sandbox,axi"; 639 #address-cells = <0x1>; 640 #size-cells = <0x1>; 641 store@0 { 642 compatible = "sandbox,sandbox_store"; 643 reg = <0x0 0x400>; 644 }; 645 }; 646 647 chosen { 648 #address-cells = <1>; 649 #size-cells = <1>; 650 chosen-test { 651 compatible = "denx,u-boot-fdt-test"; 652 reg = <9 1>; 653 }; 654 }; 655 656 translation-test@8000 { 657 compatible = "simple-bus"; 658 reg = <0x8000 0x4000>; 659 660 #address-cells = <0x2>; 661 #size-cells = <0x1>; 662 663 ranges = <0 0x0 0x8000 0x1000 664 1 0x100 0x9000 0x1000 665 2 0x200 0xA000 0x1000 666 3 0x300 0xB000 0x1000 667 >; 668 669 dev@0,0 { 670 compatible = "denx,u-boot-fdt-dummy"; 671 reg = <0 0x0 0x1000>; 672 }; 673 674 dev@1,100 { 675 compatible = "denx,u-boot-fdt-dummy"; 676 reg = <1 0x100 0x1000>; 677 678 }; 679 680 dev@2,200 { 681 compatible = "denx,u-boot-fdt-dummy"; 682 reg = <2 0x200 0x1000>; 683 }; 684 685 686 noxlatebus@3,300 { 687 compatible = "simple-bus"; 688 reg = <3 0x300 0x1000>; 689 690 #address-cells = <0x1>; 691 #size-cells = <0x0>; 692 693 dev@42 { 694 compatible = "denx,u-boot-fdt-dummy"; 695 reg = <0x42>; 696 }; 697 }; 698 }; 699 700 osd { 701 compatible = "sandbox,sandbox_osd"; 702 }; 703 704 board { 705 compatible = "sandbox,board_sandbox"; 706 }; 707 708 sandbox_tee { 709 compatible = "sandbox,tee"; 710 }; 711}; 712 713#include "sandbox_pmic.dtsi" 714