1/dts-v1/; 2 3/ { 4 model = "sandbox"; 5 compatible = "sandbox"; 6 #address-cells = <1>; 7 #size-cells = <1>; 8 9 aliases { 10 console = &uart0; 11 eth0 = "/eth@10002000"; 12 eth3 = ð_3; 13 eth5 = ð_5; 14 gpio1 = &gpio_a; 15 gpio2 = &gpio_b; 16 i2c0 = "/i2c@0"; 17 mmc0 = "/mmc0"; 18 mmc1 = "/mmc1"; 19 pci0 = &pci0; 20 pci1 = &pci1; 21 pci2 = &pci2; 22 remoteproc1 = &rproc_1; 23 remoteproc2 = &rproc_2; 24 rtc0 = &rtc_0; 25 rtc1 = &rtc_1; 26 spi0 = "/spi@0"; 27 testfdt6 = "/e-test"; 28 testbus3 = "/some-bus"; 29 testfdt0 = "/some-bus/c-test@0"; 30 testfdt1 = "/some-bus/c-test@1"; 31 testfdt3 = "/b-test"; 32 testfdt5 = "/some-bus/c-test@5"; 33 testfdt8 = "/a-test"; 34 fdt-dummy0 = "/translation-test@8000/dev@0,0"; 35 fdt-dummy1 = "/translation-test@8000/dev@1,100"; 36 fdt-dummy2 = "/translation-test@8000/dev@2,200"; 37 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; 38 usb0 = &usb_0; 39 usb1 = &usb_1; 40 usb2 = &usb_2; 41 axi0 = &axi; 42 osd0 = "/osd"; 43 }; 44 45 cros_ec: cros-ec { 46 reg = <0 0>; 47 compatible = "google,cros-ec-sandbox"; 48 49 /* 50 * This describes the flash memory within the EC. Note 51 * that the STM32L flash erases to 0, not 0xff. 52 */ 53 flash { 54 image-pos = <0x08000000>; 55 size = <0x20000>; 56 erase-value = <0>; 57 58 /* Information for sandbox */ 59 ro { 60 image-pos = <0>; 61 size = <0xf000>; 62 }; 63 wp-ro { 64 image-pos = <0xf000>; 65 size = <0x1000>; 66 }; 67 rw { 68 image-pos = <0x10000>; 69 size = <0x10000>; 70 }; 71 }; 72 }; 73 74 a-test { 75 reg = <0 1>; 76 compatible = "denx,u-boot-fdt-test"; 77 ping-expect = <0>; 78 ping-add = <0>; 79 u-boot,dm-pre-reloc; 80 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>, 81 <0>, <&gpio_a 12>; 82 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>, 83 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>, 84 <&gpio_b 9 0xc 3 2 1>; 85 }; 86 87 junk { 88 reg = <1 1>; 89 compatible = "not,compatible"; 90 }; 91 92 no-compatible { 93 reg = <2 1>; 94 }; 95 96 backlight: backlight { 97 compatible = "pwm-backlight"; 98 enable-gpios = <&gpio_a 1>; 99 power-supply = <&ldo_1>; 100 pwms = <&pwm 0 1000>; 101 default-brightness-level = <5>; 102 brightness-levels = <0 16 32 64 128 170 202 234 255>; 103 }; 104 105 bind-test { 106 bind-test-child1 { 107 compatible = "sandbox,phy"; 108 #phy-cells = <1>; 109 }; 110 111 bind-test-child2 { 112 compatible = "simple-bus"; 113 }; 114 }; 115 116 b-test { 117 reg = <3 1>; 118 compatible = "denx,u-boot-fdt-test"; 119 ping-expect = <3>; 120 ping-add = <3>; 121 }; 122 123 phy_provider0: gen_phy@0 { 124 compatible = "sandbox,phy"; 125 #phy-cells = <1>; 126 }; 127 128 phy_provider1: gen_phy@1 { 129 compatible = "sandbox,phy"; 130 #phy-cells = <0>; 131 broken; 132 }; 133 134 gen_phy_user: gen_phy_user { 135 compatible = "simple-bus"; 136 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; 137 phy-names = "phy1", "phy2", "phy3"; 138 }; 139 140 some-bus { 141 #address-cells = <1>; 142 #size-cells = <0>; 143 compatible = "denx,u-boot-test-bus"; 144 reg = <3 1>; 145 ping-expect = <4>; 146 ping-add = <4>; 147 c-test@5 { 148 compatible = "denx,u-boot-fdt-test"; 149 reg = <5>; 150 ping-expect = <5>; 151 ping-add = <5>; 152 }; 153 c-test@0 { 154 compatible = "denx,u-boot-fdt-test"; 155 reg = <0>; 156 ping-expect = <6>; 157 ping-add = <6>; 158 }; 159 c-test@1 { 160 compatible = "denx,u-boot-fdt-test"; 161 reg = <1>; 162 ping-expect = <7>; 163 ping-add = <7>; 164 }; 165 }; 166 167 d-test { 168 reg = <3 1>; 169 ping-expect = <6>; 170 ping-add = <6>; 171 compatible = "google,another-fdt-test"; 172 }; 173 174 e-test { 175 reg = <3 1>; 176 ping-expect = <6>; 177 ping-add = <6>; 178 compatible = "google,another-fdt-test"; 179 }; 180 181 f-test { 182 compatible = "denx,u-boot-fdt-test"; 183 }; 184 185 g-test { 186 compatible = "denx,u-boot-fdt-test"; 187 }; 188 189 h-test { 190 compatible = "denx,u-boot-fdt-test1"; 191 }; 192 193 clocks { 194 clk_fixed: clk-fixed { 195 compatible = "fixed-clock"; 196 #clock-cells = <0>; 197 clock-frequency = <1234>; 198 }; 199 }; 200 201 clk_sandbox: clk-sbox { 202 compatible = "sandbox,clk"; 203 #clock-cells = <1>; 204 }; 205 206 clk-test { 207 compatible = "sandbox,clk-test"; 208 clocks = <&clk_fixed>, 209 <&clk_sandbox 1>, 210 <&clk_sandbox 0>; 211 clock-names = "fixed", "i2c", "spi"; 212 }; 213 214 eth@10002000 { 215 compatible = "sandbox,eth"; 216 reg = <0x10002000 0x1000>; 217 fake-host-hwaddr = [00 00 66 44 22 00]; 218 }; 219 220 eth_5: eth@10003000 { 221 compatible = "sandbox,eth"; 222 reg = <0x10003000 0x1000>; 223 fake-host-hwaddr = [00 00 66 44 22 11]; 224 }; 225 226 eth_3: sbe5 { 227 compatible = "sandbox,eth"; 228 reg = <0x10005000 0x1000>; 229 fake-host-hwaddr = [00 00 66 44 22 33]; 230 }; 231 232 eth@10004000 { 233 compatible = "sandbox,eth"; 234 reg = <0x10004000 0x1000>; 235 fake-host-hwaddr = [00 00 66 44 22 22]; 236 }; 237 238 firmware { 239 sandbox_firmware: sandbox-firmware { 240 compatible = "sandbox,firmware"; 241 }; 242 }; 243 244 gpio_a: base-gpios { 245 compatible = "sandbox,gpio"; 246 gpio-controller; 247 #gpio-cells = <1>; 248 gpio-bank-name = "a"; 249 sandbox,gpio-count = <20>; 250 }; 251 252 gpio_b: extra-gpios { 253 compatible = "sandbox,gpio"; 254 gpio-controller; 255 #gpio-cells = <5>; 256 gpio-bank-name = "b"; 257 sandbox,gpio-count = <10>; 258 }; 259 260 i2c@0 { 261 #address-cells = <1>; 262 #size-cells = <0>; 263 reg = <0 1>; 264 compatible = "sandbox,i2c"; 265 clock-frequency = <100000>; 266 eeprom@2c { 267 reg = <0x2c>; 268 compatible = "i2c-eeprom"; 269 emul { 270 compatible = "sandbox,i2c-eeprom"; 271 sandbox,filename = "i2c.bin"; 272 sandbox,size = <256>; 273 }; 274 }; 275 276 rtc_0: rtc@43 { 277 reg = <0x43>; 278 compatible = "sandbox-rtc"; 279 emul { 280 compatible = "sandbox,i2c-rtc"; 281 }; 282 }; 283 284 rtc_1: rtc@61 { 285 reg = <0x61>; 286 compatible = "sandbox-rtc"; 287 emul { 288 compatible = "sandbox,i2c-rtc"; 289 }; 290 }; 291 292 sandbox_pmic: sandbox_pmic { 293 reg = <0x40>; 294 }; 295 296 mc34708: pmic@41 { 297 reg = <0x41>; 298 }; 299 }; 300 301 adc@0 { 302 compatible = "sandbox,adc"; 303 vdd-supply = <&buck2>; 304 vss-microvolts = <0>; 305 }; 306 307 lcd { 308 u-boot,dm-pre-reloc; 309 compatible = "sandbox,lcd-sdl"; 310 xres = <1366>; 311 yres = <768>; 312 }; 313 314 leds { 315 compatible = "gpio-leds"; 316 317 iracibble { 318 gpios = <&gpio_a 1 0>; 319 label = "sandbox:red"; 320 }; 321 322 martinet { 323 gpios = <&gpio_a 2 0>; 324 label = "sandbox:green"; 325 }; 326 327 default_on { 328 gpios = <&gpio_a 5 0>; 329 label = "sandbox:default_on"; 330 default-state = "on"; 331 }; 332 333 default_off { 334 gpios = <&gpio_a 6 0>; 335 label = "sandbox:default_off"; 336 default-state = "off"; 337 }; 338 }; 339 340 mbox: mbox { 341 compatible = "sandbox,mbox"; 342 #mbox-cells = <1>; 343 }; 344 345 mbox-test { 346 compatible = "sandbox,mbox-test"; 347 mboxes = <&mbox 100>, <&mbox 1>; 348 mbox-names = "other", "test"; 349 }; 350 351 cpu-test1 { 352 compatible = "sandbox,cpu_sandbox"; 353 }; 354 355 cpu-test2 { 356 compatible = "sandbox,cpu_sandbox"; 357 }; 358 359 cpu-test3 { 360 compatible = "sandbox,cpu_sandbox"; 361 }; 362 363 misc-test { 364 compatible = "sandbox,misc_sandbox"; 365 }; 366 367 mmc2 { 368 compatible = "sandbox,mmc"; 369 }; 370 371 mmc1 { 372 compatible = "sandbox,mmc"; 373 }; 374 375 mmc0 { 376 compatible = "sandbox,mmc"; 377 }; 378 379 pci0: pci-controller0 { 380 compatible = "sandbox,pci"; 381 device_type = "pci"; 382 #address-cells = <3>; 383 #size-cells = <2>; 384 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 385 0x01000000 0 0x20000000 0x20000000 0 0x2000>; 386 pci@0,0 { 387 compatible = "pci-generic"; 388 reg = <0x0000 0 0 0 0>; 389 emul@0,0 { 390 compatible = "sandbox,swap-case"; 391 }; 392 }; 393 pci@1f,0 { 394 compatible = "pci-generic"; 395 reg = <0xf800 0 0 0 0>; 396 emul@1f,0 { 397 compatible = "sandbox,swap-case"; 398 }; 399 }; 400 }; 401 402 pci1: pci-controller1 { 403 compatible = "sandbox,pci"; 404 device_type = "pci"; 405 #address-cells = <3>; 406 #size-cells = <2>; 407 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 408 0x01000000 0 0x40000000 0x40000000 0 0x2000>; 409 sandbox,dev-info = <0x08 0x00 0x1234 0x5678 410 0x0c 0x00 0x1234 0x5678 411 0x10 0x00 0x1234 0x5678>; 412 pci@10,0 { 413 reg = <0x8000 0 0 0 0>; 414 }; 415 }; 416 417 pci2: pci-controller2 { 418 compatible = "sandbox,pci"; 419 device_type = "pci"; 420 #address-cells = <3>; 421 #size-cells = <2>; 422 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 423 0x01000000 0 0x60000000 0x60000000 0 0x2000>; 424 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; 425 pci@1f,0 { 426 compatible = "pci-generic"; 427 reg = <0xf800 0 0 0 0>; 428 emul@1f,0 { 429 compatible = "sandbox,swap-case"; 430 }; 431 }; 432 }; 433 434 probing { 435 compatible = "simple-bus"; 436 test1 { 437 compatible = "denx,u-boot-probe-test"; 438 }; 439 440 test2 { 441 compatible = "denx,u-boot-probe-test"; 442 }; 443 444 test3 { 445 compatible = "denx,u-boot-probe-test"; 446 }; 447 448 test4 { 449 compatible = "denx,u-boot-probe-test"; 450 }; 451 }; 452 453 pwrdom: power-domain { 454 compatible = "sandbox,power-domain"; 455 #power-domain-cells = <1>; 456 }; 457 458 power-domain-test { 459 compatible = "sandbox,power-domain-test"; 460 power-domains = <&pwrdom 2>; 461 }; 462 463 pwm: pwm { 464 compatible = "sandbox,pwm"; 465 #pwm-cells = <2>; 466 }; 467 468 pwm2 { 469 compatible = "sandbox,pwm"; 470 #pwm-cells = <2>; 471 }; 472 473 ram { 474 compatible = "sandbox,ram"; 475 }; 476 477 reset@0 { 478 compatible = "sandbox,warm-reset"; 479 }; 480 481 reset@1 { 482 compatible = "sandbox,reset"; 483 }; 484 485 resetc: reset-ctl { 486 compatible = "sandbox,reset-ctl"; 487 #reset-cells = <1>; 488 }; 489 490 reset-ctl-test { 491 compatible = "sandbox,reset-ctl-test"; 492 resets = <&resetc 100>, <&resetc 2>; 493 reset-names = "other", "test"; 494 }; 495 496 rproc_1: rproc@1 { 497 compatible = "sandbox,test-processor"; 498 remoteproc-name = "remoteproc-test-dev1"; 499 }; 500 501 rproc_2: rproc@2 { 502 compatible = "sandbox,test-processor"; 503 internal-memory-mapped; 504 remoteproc-name = "remoteproc-test-dev2"; 505 }; 506 507 panel { 508 compatible = "simple-panel"; 509 backlight = <&backlight 0 100>; 510 }; 511 512 smem@0 { 513 compatible = "sandbox,smem"; 514 }; 515 516 spi@0 { 517 #address-cells = <1>; 518 #size-cells = <0>; 519 reg = <0 1>; 520 compatible = "sandbox,spi"; 521 cs-gpios = <0>, <&gpio_a 0>; 522 spi.bin@0 { 523 reg = <0>; 524 compatible = "spansion,m25p16", "spi-flash"; 525 spi-max-frequency = <40000000>; 526 sandbox,filename = "spi.bin"; 527 }; 528 }; 529 530 syscon@0 { 531 compatible = "sandbox,syscon0"; 532 reg = <0x10 16>; 533 }; 534 535 syscon@1 { 536 compatible = "sandbox,syscon1"; 537 reg = <0x20 5 538 0x28 6 539 0x30 7 540 0x38 8>; 541 }; 542 543 syscon@2 { 544 compatible = "simple-mfd", "syscon"; 545 reg = <0x40 5 546 0x48 6 547 0x50 7 548 0x58 8>; 549 }; 550 551 timer { 552 compatible = "sandbox,timer"; 553 clock-frequency = <1000000>; 554 }; 555 556 tpm2 { 557 compatible = "sandbox,tpm2"; 558 }; 559 560 uart0: serial { 561 compatible = "sandbox,serial"; 562 u-boot,dm-pre-reloc; 563 }; 564 565 usb_0: usb@0 { 566 compatible = "sandbox,usb"; 567 status = "disabled"; 568 hub { 569 compatible = "sandbox,usb-hub"; 570 #address-cells = <1>; 571 #size-cells = <0>; 572 flash-stick { 573 reg = <0>; 574 compatible = "sandbox,usb-flash"; 575 }; 576 }; 577 }; 578 579 usb_1: usb@1 { 580 compatible = "sandbox,usb"; 581 hub { 582 compatible = "usb-hub"; 583 usb,device-class = <9>; 584 hub-emul { 585 compatible = "sandbox,usb-hub"; 586 #address-cells = <1>; 587 #size-cells = <0>; 588 flash-stick@0 { 589 reg = <0>; 590 compatible = "sandbox,usb-flash"; 591 sandbox,filepath = "testflash.bin"; 592 }; 593 594 flash-stick@1 { 595 reg = <1>; 596 compatible = "sandbox,usb-flash"; 597 sandbox,filepath = "testflash1.bin"; 598 }; 599 600 flash-stick@2 { 601 reg = <2>; 602 compatible = "sandbox,usb-flash"; 603 sandbox,filepath = "testflash2.bin"; 604 }; 605 606 keyb@3 { 607 reg = <3>; 608 compatible = "sandbox,usb-keyb"; 609 }; 610 611 }; 612 }; 613 }; 614 615 usb_2: usb@2 { 616 compatible = "sandbox,usb"; 617 status = "disabled"; 618 }; 619 620 spmi: spmi@0 { 621 compatible = "sandbox,spmi"; 622 #address-cells = <0x1>; 623 #size-cells = <0x1>; 624 pm8916@0 { 625 compatible = "qcom,spmi-pmic"; 626 reg = <0x0 0x1>; 627 #address-cells = <0x1>; 628 #size-cells = <0x1>; 629 630 spmi_gpios: gpios@c000 { 631 compatible = "qcom,pm8916-gpio"; 632 reg = <0xc000 0x400>; 633 gpio-controller; 634 gpio-count = <4>; 635 #gpio-cells = <2>; 636 gpio-bank-name="spmi"; 637 }; 638 }; 639 }; 640 641 wdt0: wdt@0 { 642 compatible = "sandbox,wdt"; 643 }; 644 645 axi: axi@0 { 646 compatible = "sandbox,axi"; 647 #address-cells = <0x1>; 648 #size-cells = <0x1>; 649 store@0 { 650 compatible = "sandbox,sandbox_store"; 651 reg = <0x0 0x400>; 652 }; 653 }; 654 655 chosen { 656 #address-cells = <1>; 657 #size-cells = <1>; 658 chosen-test { 659 compatible = "denx,u-boot-fdt-test"; 660 reg = <9 1>; 661 }; 662 }; 663 664 translation-test@8000 { 665 compatible = "simple-bus"; 666 reg = <0x8000 0x4000>; 667 668 #address-cells = <0x2>; 669 #size-cells = <0x1>; 670 671 ranges = <0 0x0 0x8000 0x1000 672 1 0x100 0x9000 0x1000 673 2 0x200 0xA000 0x1000 674 3 0x300 0xB000 0x1000 675 >; 676 677 dev@0,0 { 678 compatible = "denx,u-boot-fdt-dummy"; 679 reg = <0 0x0 0x1000>; 680 }; 681 682 dev@1,100 { 683 compatible = "denx,u-boot-fdt-dummy"; 684 reg = <1 0x100 0x1000>; 685 686 }; 687 688 dev@2,200 { 689 compatible = "denx,u-boot-fdt-dummy"; 690 reg = <2 0x200 0x1000>; 691 }; 692 693 694 noxlatebus@3,300 { 695 compatible = "simple-bus"; 696 reg = <3 0x300 0x1000>; 697 698 #address-cells = <0x1>; 699 #size-cells = <0x0>; 700 701 dev@42 { 702 compatible = "denx,u-boot-fdt-dummy"; 703 reg = <0x42>; 704 }; 705 }; 706 }; 707 708 osd { 709 compatible = "sandbox,sandbox_osd"; 710 }; 711 712 board { 713 compatible = "sandbox,board_sandbox"; 714 }; 715 716 sandbox_tee { 717 compatible = "sandbox,tee"; 718 }; 719}; 720 721#include "sandbox_pmic.dtsi" 722