xref: /openbmc/u-boot/arch/sandbox/dts/test.dts (revision 2c5eac1e) 
1/dts-v1/;
2
3/ {
4	model = "sandbox";
5	compatible = "sandbox";
6	#address-cells = <1>;
7	#size-cells = <1>;
8
9	aliases {
10		console = &uart0;
11		eth0 = "/eth@10002000";
12		eth3 = &eth_3;
13		eth5 = &eth_5;
14		i2c0 = "/i2c@0";
15		mmc0 = "/mmc0";
16		mmc1 = "/mmc1";
17		pci0 = &pci0;
18		pci1 = &pci1;
19		pci2 = &pci2;
20		remoteproc1 = &rproc_1;
21		remoteproc2 = &rproc_2;
22		rtc0 = &rtc_0;
23		rtc1 = &rtc_1;
24		spi0 = "/spi@0";
25		testfdt6 = "/e-test";
26		testbus3 = "/some-bus";
27		testfdt0 = "/some-bus/c-test@0";
28		testfdt1 = "/some-bus/c-test@1";
29		testfdt3 = "/b-test";
30		testfdt5 = "/some-bus/c-test@5";
31		testfdt8 = "/a-test";
32		fdt-dummy0 = "/translation-test@8000/dev@0,0";
33		fdt-dummy1 = "/translation-test@8000/dev@1,100";
34		fdt-dummy2 = "/translation-test@8000/dev@2,200";
35		fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
36		usb0 = &usb_0;
37		usb1 = &usb_1;
38		usb2 = &usb_2;
39		axi0 = &axi;
40		osd0 = "/osd";
41	};
42
43	cros_ec: cros-ec {
44		reg = <0 0>;
45		compatible = "google,cros-ec-sandbox";
46
47		/*
48		 * This describes the flash memory within the EC. Note
49		 * that the STM32L flash erases to 0, not 0xff.
50		 */
51		flash {
52			image-pos = <0x08000000>;
53			size = <0x20000>;
54			erase-value = <0>;
55
56			/* Information for sandbox */
57			ro {
58				image-pos = <0>;
59				size = <0xf000>;
60			};
61			wp-ro {
62				image-pos = <0xf000>;
63				size = <0x1000>;
64			};
65			rw {
66				image-pos = <0x10000>;
67				size = <0x10000>;
68			};
69		};
70	};
71
72	a-test {
73		reg = <0 1>;
74		compatible = "denx,u-boot-fdt-test";
75		ping-expect = <0>;
76		ping-add = <0>;
77		u-boot,dm-pre-reloc;
78		test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
79			<0>, <&gpio_a 12>;
80		test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
81			<&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
82			<&gpio_b 9 0xc 3 2 1>;
83	};
84
85	junk {
86		reg = <1 1>;
87		compatible = "not,compatible";
88	};
89
90	no-compatible {
91		reg = <2 1>;
92	};
93
94	bind-test {
95		bind-test-child1 {
96			compatible = "sandbox,phy";
97			#phy-cells = <1>;
98		};
99
100		bind-test-child2 {
101			compatible = "simple-bus";
102		};
103	};
104
105	b-test {
106		reg = <3 1>;
107		compatible = "denx,u-boot-fdt-test";
108		ping-expect = <3>;
109		ping-add = <3>;
110	};
111
112	phy_provider0: gen_phy@0 {
113		compatible = "sandbox,phy";
114		#phy-cells = <1>;
115	};
116
117	phy_provider1: gen_phy@1 {
118		compatible = "sandbox,phy";
119		#phy-cells = <0>;
120		broken;
121	};
122
123	gen_phy_user: gen_phy_user {
124		compatible = "simple-bus";
125		phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
126		phy-names = "phy1", "phy2", "phy3";
127	};
128
129	some-bus {
130		#address-cells = <1>;
131		#size-cells = <0>;
132		compatible = "denx,u-boot-test-bus";
133		reg = <3 1>;
134		ping-expect = <4>;
135		ping-add = <4>;
136		c-test@5 {
137			compatible = "denx,u-boot-fdt-test";
138			reg = <5>;
139			ping-expect = <5>;
140			ping-add = <5>;
141		};
142		c-test@0 {
143			compatible = "denx,u-boot-fdt-test";
144			reg = <0>;
145			ping-expect = <6>;
146			ping-add = <6>;
147		};
148		c-test@1 {
149			compatible = "denx,u-boot-fdt-test";
150			reg = <1>;
151			ping-expect = <7>;
152			ping-add = <7>;
153		};
154	};
155
156	d-test {
157		reg = <3 1>;
158		ping-expect = <6>;
159		ping-add = <6>;
160		compatible = "google,another-fdt-test";
161	};
162
163	e-test {
164		reg = <3 1>;
165		ping-expect = <6>;
166		ping-add = <6>;
167		compatible = "google,another-fdt-test";
168	};
169
170	f-test {
171		compatible = "denx,u-boot-fdt-test";
172	};
173
174	g-test {
175		compatible = "denx,u-boot-fdt-test";
176	};
177
178	clocks {
179		clk_fixed: clk-fixed {
180			compatible = "fixed-clock";
181			#clock-cells = <0>;
182			clock-frequency = <1234>;
183		};
184	};
185
186	clk_sandbox: clk-sbox {
187		compatible = "sandbox,clk";
188		#clock-cells = <1>;
189	};
190
191	clk-test {
192		compatible = "sandbox,clk-test";
193		clocks = <&clk_fixed>,
194			 <&clk_sandbox 1>,
195			 <&clk_sandbox 0>;
196		clock-names = "fixed", "i2c", "spi";
197	};
198
199	eth@10002000 {
200		compatible = "sandbox,eth";
201		reg = <0x10002000 0x1000>;
202		fake-host-hwaddr = [00 00 66 44 22 00];
203	};
204
205	eth_5: eth@10003000 {
206		compatible = "sandbox,eth";
207		reg = <0x10003000 0x1000>;
208		fake-host-hwaddr = [00 00 66 44 22 11];
209	};
210
211	eth_3: sbe5 {
212		compatible = "sandbox,eth";
213		reg = <0x10005000 0x1000>;
214		fake-host-hwaddr = [00 00 66 44 22 33];
215	};
216
217	eth@10004000 {
218		compatible = "sandbox,eth";
219		reg = <0x10004000 0x1000>;
220		fake-host-hwaddr = [00 00 66 44 22 22];
221	};
222
223	firmware {
224		sandbox_firmware: sandbox-firmware {
225			compatible = "sandbox,firmware";
226		};
227	};
228
229	gpio_a: base-gpios {
230		compatible = "sandbox,gpio";
231		gpio-controller;
232		#gpio-cells = <1>;
233		gpio-bank-name = "a";
234		sandbox,gpio-count = <20>;
235	};
236
237	gpio_b: extra-gpios {
238		compatible = "sandbox,gpio";
239		gpio-controller;
240		#gpio-cells = <5>;
241		gpio-bank-name = "b";
242		sandbox,gpio-count = <10>;
243	};
244
245	i2c@0 {
246		#address-cells = <1>;
247		#size-cells = <0>;
248		reg = <0 1>;
249		compatible = "sandbox,i2c";
250		clock-frequency = <100000>;
251		eeprom@2c {
252			reg = <0x2c>;
253			compatible = "i2c-eeprom";
254			emul {
255				compatible = "sandbox,i2c-eeprom";
256				sandbox,filename = "i2c.bin";
257				sandbox,size = <256>;
258			};
259		};
260
261		rtc_0: rtc@43 {
262			reg = <0x43>;
263			compatible = "sandbox-rtc";
264			emul {
265				compatible = "sandbox,i2c-rtc";
266			};
267		};
268
269		rtc_1: rtc@61 {
270			reg = <0x61>;
271			compatible = "sandbox-rtc";
272			emul {
273				compatible = "sandbox,i2c-rtc";
274			};
275		};
276
277		sandbox_pmic: sandbox_pmic {
278			reg = <0x40>;
279		};
280
281		mc34708: pmic@41 {
282			reg = <0x41>;
283		};
284	};
285
286	adc@0 {
287		compatible = "sandbox,adc";
288		vdd-supply = <&buck2>;
289		vss-microvolts = <0>;
290	};
291
292	lcd {
293		u-boot,dm-pre-reloc;
294		compatible = "sandbox,lcd-sdl";
295		xres = <1366>;
296		yres = <768>;
297	};
298
299	leds {
300		compatible = "gpio-leds";
301
302		iracibble {
303			gpios = <&gpio_a 1 0>;
304			label = "sandbox:red";
305		};
306
307		martinet {
308			gpios = <&gpio_a 2 0>;
309			label = "sandbox:green";
310		};
311
312		default_on {
313			gpios = <&gpio_a 5 0>;
314			label = "sandbox:default_on";
315			default-state = "on";
316		};
317
318		default_off {
319			gpios = <&gpio_a 6 0>;
320			label = "sandbox:default_off";
321			default-state = "off";
322		};
323	};
324
325	mbox: mbox {
326		compatible = "sandbox,mbox";
327		#mbox-cells = <1>;
328	};
329
330	mbox-test {
331		compatible = "sandbox,mbox-test";
332		mboxes = <&mbox 100>, <&mbox 1>;
333		mbox-names = "other", "test";
334	};
335
336	cpu-test1 {
337		compatible = "sandbox,cpu_sandbox";
338	};
339
340	cpu-test2 {
341		compatible = "sandbox,cpu_sandbox";
342	};
343
344	cpu-test3 {
345		compatible = "sandbox,cpu_sandbox";
346	};
347
348	misc-test {
349		compatible = "sandbox,misc_sandbox";
350	};
351
352	mmc2 {
353		compatible = "sandbox,mmc";
354	};
355
356	mmc1 {
357		compatible = "sandbox,mmc";
358	};
359
360	mmc0 {
361		compatible = "sandbox,mmc";
362	};
363
364	pci0: pci-controller0 {
365		compatible = "sandbox,pci";
366		device_type = "pci";
367		#address-cells = <3>;
368		#size-cells = <2>;
369		ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
370				0x01000000 0 0x20000000 0x20000000 0 0x2000>;
371		pci@0,0 {
372			compatible = "pci-generic";
373			reg = <0x0000 0 0 0 0>;
374			emul@0,0 {
375				compatible = "sandbox,swap-case";
376			};
377		};
378		pci@1f,0 {
379			compatible = "pci-generic";
380			reg = <0xf800 0 0 0 0>;
381			emul@1f,0 {
382				compatible = "sandbox,swap-case";
383			};
384		};
385	};
386
387	pci1: pci-controller1 {
388		compatible = "sandbox,pci";
389		device_type = "pci";
390		#address-cells = <3>;
391		#size-cells = <2>;
392		ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
393				0x01000000 0 0x40000000 0x40000000 0 0x2000>;
394		sandbox,dev-info = <0x08 0x00 0x1234 0x5678
395				    0x0c 0x00 0x1234 0x5678>;
396	};
397
398	pci2: pci-controller2 {
399		compatible = "sandbox,pci";
400		device_type = "pci";
401		#address-cells = <3>;
402		#size-cells = <2>;
403		ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
404				0x01000000 0 0x60000000 0x60000000 0 0x2000>;
405		sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
406		pci@1f,0 {
407			compatible = "pci-generic";
408			reg = <0xf800 0 0 0 0>;
409			emul@1f,0 {
410				compatible = "sandbox,swap-case";
411			};
412		};
413	};
414
415	probing {
416		compatible = "simple-bus";
417		test1 {
418			compatible = "denx,u-boot-probe-test";
419		};
420
421		test2 {
422			compatible = "denx,u-boot-probe-test";
423		};
424
425		test3 {
426			compatible = "denx,u-boot-probe-test";
427		};
428
429		test4 {
430			compatible = "denx,u-boot-probe-test";
431		};
432	};
433
434	pwrdom: power-domain {
435		compatible = "sandbox,power-domain";
436		#power-domain-cells = <1>;
437	};
438
439	power-domain-test {
440		compatible = "sandbox,power-domain-test";
441		power-domains = <&pwrdom 2>;
442	};
443
444	pwm {
445		compatible = "sandbox,pwm";
446	};
447
448	pwm2 {
449		compatible = "sandbox,pwm";
450	};
451
452	ram {
453		compatible = "sandbox,ram";
454	};
455
456	reset@0 {
457		compatible = "sandbox,warm-reset";
458	};
459
460	reset@1 {
461		compatible = "sandbox,reset";
462	};
463
464	resetc: reset-ctl {
465		compatible = "sandbox,reset-ctl";
466		#reset-cells = <1>;
467	};
468
469	reset-ctl-test {
470		compatible = "sandbox,reset-ctl-test";
471		resets = <&resetc 100>, <&resetc 2>;
472		reset-names = "other", "test";
473	};
474
475	rproc_1: rproc@1 {
476		compatible = "sandbox,test-processor";
477		remoteproc-name = "remoteproc-test-dev1";
478	};
479
480	rproc_2: rproc@2 {
481		compatible = "sandbox,test-processor";
482		internal-memory-mapped;
483		remoteproc-name = "remoteproc-test-dev2";
484	};
485
486	smem@0 {
487		compatible = "sandbox,smem";
488	};
489
490	spi@0 {
491		#address-cells = <1>;
492		#size-cells = <0>;
493		reg = <0 1>;
494		compatible = "sandbox,spi";
495		cs-gpios = <0>, <&gpio_a 0>;
496		spi.bin@0 {
497			reg = <0>;
498			compatible = "spansion,m25p16", "spi-flash";
499			spi-max-frequency = <40000000>;
500			sandbox,filename = "spi.bin";
501		};
502	};
503
504	syscon@0 {
505		compatible = "sandbox,syscon0";
506		reg = <0x10 4>;
507	};
508
509	syscon@1 {
510		compatible = "sandbox,syscon1";
511		reg = <0x20 5
512			0x28 6
513			0x30 7
514			0x38 8>;
515	};
516
517	syscon@2 {
518		compatible = "simple-mfd", "syscon";
519		reg = <0x40 5
520			0x48 6
521			0x50 7
522			0x58 8>;
523	};
524
525	timer {
526		compatible = "sandbox,timer";
527		clock-frequency = <1000000>;
528	};
529
530	tpm2 {
531		compatible = "sandbox,tpm2";
532	};
533
534	uart0: serial {
535		compatible = "sandbox,serial";
536		u-boot,dm-pre-reloc;
537	};
538
539	usb_0: usb@0 {
540		compatible = "sandbox,usb";
541		status = "disabled";
542		hub {
543			compatible = "sandbox,usb-hub";
544			#address-cells = <1>;
545			#size-cells = <0>;
546			flash-stick {
547				reg = <0>;
548				compatible = "sandbox,usb-flash";
549			};
550		};
551	};
552
553	usb_1: usb@1 {
554		compatible = "sandbox,usb";
555		hub {
556			compatible = "usb-hub";
557			usb,device-class = <9>;
558			hub-emul {
559				compatible = "sandbox,usb-hub";
560				#address-cells = <1>;
561				#size-cells = <0>;
562				flash-stick@0 {
563					reg = <0>;
564					compatible = "sandbox,usb-flash";
565					sandbox,filepath = "testflash.bin";
566				};
567
568				flash-stick@1 {
569					reg = <1>;
570					compatible = "sandbox,usb-flash";
571					sandbox,filepath = "testflash1.bin";
572				};
573
574				flash-stick@2 {
575					reg = <2>;
576					compatible = "sandbox,usb-flash";
577					sandbox,filepath = "testflash2.bin";
578				};
579
580				keyb@3 {
581					reg = <3>;
582					compatible = "sandbox,usb-keyb";
583				};
584
585			};
586		};
587	};
588
589	usb_2: usb@2 {
590		compatible = "sandbox,usb";
591		status = "disabled";
592	};
593
594	spmi: spmi@0 {
595		compatible = "sandbox,spmi";
596		#address-cells = <0x1>;
597		#size-cells = <0x1>;
598		pm8916@0 {
599			compatible = "qcom,spmi-pmic";
600			reg = <0x0 0x1>;
601			#address-cells = <0x1>;
602			#size-cells = <0x1>;
603
604			spmi_gpios: gpios@c000 {
605				compatible = "qcom,pm8916-gpio";
606				reg = <0xc000 0x400>;
607				gpio-controller;
608				gpio-count = <4>;
609				#gpio-cells = <2>;
610				gpio-bank-name="spmi";
611			};
612		};
613	};
614
615	wdt0: wdt@0 {
616		compatible = "sandbox,wdt";
617	};
618
619	axi: axi@0 {
620		compatible = "sandbox,axi";
621		#address-cells = <0x1>;
622		#size-cells = <0x1>;
623		store@0 {
624			compatible = "sandbox,sandbox_store";
625			reg = <0x0 0x400>;
626		};
627	};
628
629	chosen {
630		#address-cells = <1>;
631		#size-cells = <1>;
632		chosen-test {
633			compatible = "denx,u-boot-fdt-test";
634			reg = <9 1>;
635		};
636	};
637
638	translation-test@8000 {
639		compatible = "simple-bus";
640		reg = <0x8000 0x4000>;
641
642		#address-cells = <0x2>;
643		#size-cells = <0x1>;
644
645		ranges = <0 0x0 0x8000 0x1000
646			  1 0x100 0x9000 0x1000
647			  2 0x200 0xA000 0x1000
648			  3 0x300 0xB000 0x1000
649			 >;
650
651		dev@0,0 {
652			compatible = "denx,u-boot-fdt-dummy";
653			reg = <0 0x0 0x1000>;
654		};
655
656		dev@1,100 {
657			compatible = "denx,u-boot-fdt-dummy";
658			reg = <1 0x100 0x1000>;
659
660		};
661
662		dev@2,200 {
663			compatible = "denx,u-boot-fdt-dummy";
664			reg = <2 0x200 0x1000>;
665		};
666
667
668		noxlatebus@3,300 {
669			compatible = "simple-bus";
670			reg = <3 0x300 0x1000>;
671
672			#address-cells = <0x1>;
673			#size-cells = <0x0>;
674
675			dev@42 {
676				compatible = "denx,u-boot-fdt-dummy";
677				reg = <0x42>;
678			};
679		};
680	};
681
682	osd {
683		compatible = "sandbox,sandbox_osd";
684	};
685
686	board {
687		compatible = "sandbox,board_sandbox";
688	};
689
690	sandbox_tee {
691		compatible = "sandbox,tee";
692	};
693};
694
695#include "sandbox_pmic.dtsi"
696