1*9c7dea60SBin Meng /* 2*9c7dea60SBin Meng * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3*9c7dea60SBin Meng * 4*9c7dea60SBin Meng * SPDX-License-Identifier: GPL-2.0+ 5*9c7dea60SBin Meng */ 6*9c7dea60SBin Meng 7*9c7dea60SBin Meng #ifndef _DT_BINDINGS_INTEL_IRQ_H_ 8*9c7dea60SBin Meng #define _DT_BINDINGS_INTEL_IRQ_H_ 9*9c7dea60SBin Meng 10*9c7dea60SBin Meng /* PCI interrupt pin */ 11*9c7dea60SBin Meng #define INTA 1 12*9c7dea60SBin Meng #define INTB 2 13*9c7dea60SBin Meng #define INTC 3 14*9c7dea60SBin Meng #define INTD 4 15*9c7dea60SBin Meng 16*9c7dea60SBin Meng /* PIRQs */ 17*9c7dea60SBin Meng #define PIRQA 0 18*9c7dea60SBin Meng #define PIRQB 1 19*9c7dea60SBin Meng #define PIRQC 2 20*9c7dea60SBin Meng #define PIRQD 3 21*9c7dea60SBin Meng #define PIRQE 4 22*9c7dea60SBin Meng #define PIRQF 5 23*9c7dea60SBin Meng #define PIRQG 6 24*9c7dea60SBin Meng #define PIRQH 7 25*9c7dea60SBin Meng 26*9c7dea60SBin Meng /* PCI bdf encoding */ 27*9c7dea60SBin Meng #ifndef PCI_BDF 28*9c7dea60SBin Meng #define PCI_BDF(b, d, f) ((b) << 16 | (d) << 11 | (f) << 8) 29*9c7dea60SBin Meng #endif 30*9c7dea60SBin Meng 31*9c7dea60SBin Meng #endif /* _DT_BINDINGS_INTEL_IRQ_H_ */ 32