xref: /openbmc/u-boot/arch/riscv/lib/setjmp.S (revision 0bdea7c4)
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) 2018 Alexander Graf <agraf@suse.de>
4 */
5
6#include <config.h>
7#include <linux/linkage.h>
8
9#ifdef CONFIG_CPU_RISCV_64
10#define STORE_IDX(reg, idx)	sd reg, (idx*8)(a0)
11#define LOAD_IDX(reg, idx)	ld reg, (idx*8)(a0)
12#else
13#define STORE_IDX(reg, idx)	sw reg, (idx*4)(a0)
14#define LOAD_IDX(reg, idx)	lw reg, (idx*4)(a0)
15#endif
16
17.pushsection .text.setjmp, "ax"
18ENTRY(setjmp)
19	/* Preserve all callee-saved registers and the SP */
20	STORE_IDX(s0, 0)
21	STORE_IDX(s1, 1)
22	STORE_IDX(s2, 2)
23	STORE_IDX(s3, 3)
24	STORE_IDX(s4, 4)
25	STORE_IDX(s5, 5)
26	STORE_IDX(s6, 6)
27	STORE_IDX(s7, 7)
28	STORE_IDX(s8, 8)
29	STORE_IDX(s9, 9)
30	STORE_IDX(s10, 10)
31	STORE_IDX(s11, 11)
32	STORE_IDX(ra, 12)
33	STORE_IDX(sp, 13)
34	li  a0, 0
35	ret
36ENDPROC(setjmp)
37.popsection
38
39.pushsection .text.longjmp, "ax"
40ENTRY(longjmp)
41	LOAD_IDX(s0, 0)
42	LOAD_IDX(s1, 1)
43	LOAD_IDX(s2, 2)
44	LOAD_IDX(s3, 3)
45	LOAD_IDX(s4, 4)
46	LOAD_IDX(s5, 5)
47	LOAD_IDX(s6, 6)
48	LOAD_IDX(s7, 7)
49	LOAD_IDX(s8, 8)
50	LOAD_IDX(s9, 9)
51	LOAD_IDX(s10, 10)
52	LOAD_IDX(s11, 11)
53	LOAD_IDX(ra, 12)
54	LOAD_IDX(sp, 13)
55
56	/* Move the return value in place, but return 1 if passed 0. */
57	beq a1, zero, longjmp_1
58	mv a0, a1
59	ret
60
61	longjmp_1:
62	li a0, 1
63	ret
64ENDPROC(longjmp)
65.popsection
66