xref: /openbmc/u-boot/arch/riscv/lib/interrupts.c (revision b500c92b)
1 /*
2  * Copyright (c) 2016-17 Microsemi Corporation.
3  * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
4  *
5  * Copyright (C) 2017 Andes Technology Corporation
6  * Rick Chen, Andes Technology Corporation <rick@andestech.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <asm/ptrace.h>
13 #include <asm/system.h>
14 #include <asm/encoding.h>
15 
16 static void _exit_trap(int code, uint epc, struct pt_regs *regs);
17 
18 int interrupt_init(void)
19 {
20 	return 0;
21 }
22 
23 /*
24  * enable interrupts
25  */
26 void enable_interrupts(void)
27 {
28 }
29 
30 /*
31  * disable interrupts
32  */
33 int disable_interrupts(void)
34 {
35 	return 0;
36 }
37 
38 uint handle_trap(uint mcause, uint epc, struct pt_regs *regs)
39 {
40 	uint is_int;
41 
42 	is_int = (mcause & MCAUSE_INT);
43 	if ((is_int) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_EXT))
44 		external_interrupt(0);	/* handle_m_ext_interrupt */
45 	else if ((is_int) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_TIMER))
46 		timer_interrupt(0);	/* handle_m_timer_interrupt */
47 	else
48 		_exit_trap(mcause, epc, regs);
49 
50 	return epc;
51 }
52 
53 /*
54  *Entry Point for PLIC Interrupt Handler
55  */
56 __attribute__((weak)) void external_interrupt(struct pt_regs *regs)
57 {
58 }
59 
60 __attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
61 {
62 }
63 
64 static void _exit_trap(int code, uint epc, struct pt_regs *regs)
65 {
66 	static const char *exception_code[] = {
67 		"Instruction address misaligned",
68 		"Instruction access fault",
69 		"Illegal instruction",
70 		"Breakpoint",
71 		"Load address misaligned"
72 	};
73 
74 	printf("exception code: %d , %s , epc %08x , ra %08lx\n",
75 		code, exception_code[code], epc, regs->ra);
76 }
77