xref: /openbmc/u-boot/arch/riscv/lib/interrupts.c (revision ae485b54)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2016-17 Microsemi Corporation.
4  * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
5  *
6  * Copyright (C) 2017 Andes Technology Corporation
7  * Rick Chen, Andes Technology Corporation <rick@andestech.com>
8  */
9 
10 #include <common.h>
11 #include <asm/ptrace.h>
12 #include <asm/system.h>
13 #include <asm/encoding.h>
14 
15 static void _exit_trap(int code, uint epc, struct pt_regs *regs);
16 
17 int interrupt_init(void)
18 {
19 	return 0;
20 }
21 
22 /*
23  * enable interrupts
24  */
25 void enable_interrupts(void)
26 {
27 }
28 
29 /*
30  * disable interrupts
31  */
32 int disable_interrupts(void)
33 {
34 	return 0;
35 }
36 
37 uint handle_trap(uint mcause, uint epc, struct pt_regs *regs)
38 {
39 	uint is_int;
40 
41 	is_int = (mcause & MCAUSE_INT);
42 	if ((is_int) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_EXT))
43 		external_interrupt(0);	/* handle_m_ext_interrupt */
44 	else if ((is_int) && ((mcause & MCAUSE_CAUSE)  == IRQ_M_TIMER))
45 		timer_interrupt(0);	/* handle_m_timer_interrupt */
46 	else
47 		_exit_trap(mcause, epc, regs);
48 
49 	return epc;
50 }
51 
52 /*
53  *Entry Point for PLIC Interrupt Handler
54  */
55 __attribute__((weak)) void external_interrupt(struct pt_regs *regs)
56 {
57 }
58 
59 __attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
60 {
61 }
62 
63 static void _exit_trap(int code, uint epc, struct pt_regs *regs)
64 {
65 	static const char * const exception_code[] = {
66 		"Instruction address misaligned",
67 		"Instruction access fault",
68 		"Illegal instruction",
69 		"Breakpoint",
70 		"Load address misaligned"
71 	};
72 
73 	printf("exception code: %d , %s , epc %08x , ra %08lx\n",
74 		code, exception_code[code], epc, regs->ra);
75 }
76