1*644a3cd7SBin Meng /* SPDX-License-Identifier: GPL-2.0+ */ 2*644a3cd7SBin Meng /* 3*644a3cd7SBin Meng * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> 4*644a3cd7SBin Meng */ 5*644a3cd7SBin Meng 6*644a3cd7SBin Meng #ifndef _ASM_SYSCON_H 7*644a3cd7SBin Meng #define _ASM_SYSCON_H 8*644a3cd7SBin Meng 9*644a3cd7SBin Meng /* 10*644a3cd7SBin Meng * System controllers in a RISC-V system 11*644a3cd7SBin Meng * 12*644a3cd7SBin Meng * So far only SiFive's Core Local Interruptor (CLINT) is defined. 13*644a3cd7SBin Meng */ 14*644a3cd7SBin Meng enum { 15*644a3cd7SBin Meng RISCV_NONE, 16*644a3cd7SBin Meng RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */ 17*644a3cd7SBin Meng }; 18*644a3cd7SBin Meng 19*644a3cd7SBin Meng #endif /* _ASM_SYSCON_H */ 20