1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 * 6 */ 7 #ifndef __ASM_RISCV_IO_H 8 #define __ASM_RISCV_IO_H 9 10 #ifdef __KERNEL__ 11 12 #include <linux/types.h> 13 #include <asm/byteorder.h> 14 15 static inline void sync(void) 16 { 17 } 18 19 /* 20 * Given a physical address and a length, return a virtual address 21 * that can be used to access the memory range with the caching 22 * properties specified by "flags". 23 */ 24 #define MAP_NOCACHE (0) 25 #define MAP_WRCOMBINE (0) 26 #define MAP_WRBACK (0) 27 #define MAP_WRTHROUGH (0) 28 29 #ifdef CONFIG_ARCH_MAP_SYSMEM 30 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) 31 { 32 if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) 33 paddr = paddr | 0x40000000; 34 return (void *)(uintptr_t)paddr; 35 } 36 37 static inline void *unmap_sysmem(const void *vaddr) 38 { 39 phys_addr_t paddr = (phys_addr_t)vaddr; 40 41 paddr = paddr & ~0x40000000; 42 return (void *)(uintptr_t)paddr; 43 } 44 45 static inline phys_addr_t map_to_sysmem(const void *ptr) 46 { 47 return (phys_addr_t)(uintptr_t)ptr; 48 } 49 #endif 50 51 static inline void * 52 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 53 { 54 return (void *)paddr; 55 } 56 57 /* 58 * Take down a mapping set up by map_physmem(). 59 */ 60 static inline void unmap_physmem(void *vaddr, unsigned long flags) 61 { 62 } 63 64 static inline phys_addr_t virt_to_phys(void *vaddr) 65 { 66 return (phys_addr_t)(vaddr); 67 } 68 69 /* 70 * Generic virtual read/write. Note that we don't support half-word 71 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 72 * to the architecture specific code. 73 */ 74 #define __arch_getb(a) (*(unsigned char *)(a)) 75 #define __arch_getw(a) (*(unsigned short *)(a)) 76 #define __arch_getl(a) (*(unsigned int *)(a)) 77 #define __arch_getq(a) (*(unsigned long *)(a)) 78 79 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 80 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 81 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 82 #define __arch_putq(v, a) (*(unsigned long *)(a) = (v)) 83 84 #define __raw_writeb(v, a) __arch_putb(v, a) 85 #define __raw_writew(v, a) __arch_putw(v, a) 86 #define __raw_writel(v, a) __arch_putl(v, a) 87 #define __raw_writeq(v, a) __arch_putq(v, a) 88 89 #define __raw_readb(a) __arch_getb(a) 90 #define __raw_readw(a) __arch_getw(a) 91 #define __raw_readl(a) __arch_getl(a) 92 #define __raw_readq(a) __arch_getq(a) 93 94 /* 95 * TODO: The kernel offers some more advanced versions of barriers, it might 96 * have some advantages to use them instead of the simple one here. 97 */ 98 #define dmb() __asm__ __volatile__ ("" : : : "memory") 99 #define __iormb() dmb() 100 #define __iowmb() dmb() 101 102 static inline void writeb(u8 val, volatile void __iomem *addr) 103 { 104 __iowmb(); 105 __arch_putb(val, addr); 106 } 107 108 static inline void writew(u16 val, volatile void __iomem *addr) 109 { 110 __iowmb(); 111 __arch_putw(val, addr); 112 } 113 114 static inline void writel(u32 val, volatile void __iomem *addr) 115 { 116 __iowmb(); 117 __arch_putl(val, addr); 118 } 119 120 static inline void writeq(u64 val, volatile void __iomem *addr) 121 { 122 __iowmb(); 123 __arch_putq(val, addr); 124 } 125 126 static inline u8 readb(const volatile void __iomem *addr) 127 { 128 u8 val; 129 130 val = __arch_getb(addr); 131 __iormb(); 132 return val; 133 } 134 135 static inline u16 readw(const volatile void __iomem *addr) 136 { 137 u16 val; 138 139 val = __arch_getw(addr); 140 __iormb(); 141 return val; 142 } 143 144 static inline u32 readl(const volatile void __iomem *addr) 145 { 146 u32 val; 147 148 val = __arch_getl(addr); 149 __iormb(); 150 return val; 151 } 152 153 static inline u64 readq(const volatile void __iomem *addr) 154 { 155 u32 val; 156 157 val = __arch_getq(addr); 158 __iormb(); 159 return val; 160 } 161 162 /* 163 * The compiler seems to be incapable of optimising constants 164 * properly. Spell it out to the compiler in some cases. 165 * These are only valid for small values of "off" (< 1<<12) 166 */ 167 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 168 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 169 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 170 171 #define __raw_base_readb(base, off) __arch_base_getb(base, off) 172 #define __raw_base_readw(base, off) __arch_base_getw(base, off) 173 #define __raw_base_readl(base, off) __arch_base_getl(base, off) 174 175 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 176 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 177 178 #define out_le32(a, v) out_arch(l, le32, a, v) 179 #define out_le16(a, v) out_arch(w, le16, a, v) 180 181 #define in_le32(a) in_arch(l, le32, a) 182 #define in_le16(a) in_arch(w, le16, a) 183 184 #define out_be32(a, v) out_arch(l, be32, a, v) 185 #define out_be16(a, v) out_arch(w, be16, a, v) 186 187 #define in_be32(a) in_arch(l, be32, a) 188 #define in_be16(a) in_arch(w, be16, a) 189 190 #define out_8(a, v) __raw_writeb(v, a) 191 #define in_8(a) __raw_readb(a) 192 193 /* 194 * Clear and set bits in one shot. These macros can be used to clear and 195 * set multiple bits in a register using a single call. These macros can 196 * also be used to set a multiple-bit bit pattern using a mask, by 197 * specifying the mask in the 'clear' parameter and the new bit pattern 198 * in the 'set' parameter. 199 */ 200 201 #define clrbits(type, addr, clear) \ 202 out_##type((addr), in_##type(addr) & ~(clear)) 203 204 #define setbits(type, addr, set) \ 205 out_##type((addr), in_##type(addr) | (set)) 206 207 #define clrsetbits(type, addr, clear, set) \ 208 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 209 210 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 211 #define setbits_be32(addr, set) setbits(be32, addr, set) 212 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 213 214 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 215 #define setbits_le32(addr, set) setbits(le32, addr, set) 216 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 217 218 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 219 #define setbits_be16(addr, set) setbits(be16, addr, set) 220 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 221 222 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 223 #define setbits_le16(addr, set) setbits(le16, addr, set) 224 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 225 226 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 227 #define setbits_8(addr, set) setbits(8, addr, set) 228 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 229 230 /* 231 * Now, pick up the machine-defined IO definitions 232 * #include <asm/arch/io.h> 233 */ 234 235 /* 236 * IO port access primitives 237 * ------------------------- 238 * 239 * The NDS32 doesn't have special IO access instructions just like ARM; 240 * all IO is memory mapped. 241 * Note that these are defined to perform little endian accesses 242 * only. Their primary purpose is to access PCI and ISA peripherals. 243 * 244 * Note that for a big endian machine, this implies that the following 245 * big endian mode connectivity is in place, as described by numerious 246 * ARM documents: 247 * 248 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 249 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 250 * 251 * The machine specific io.h include defines __io to translate an "IO" 252 * address to a memory address. 253 * 254 * Note that we prevent GCC re-ordering or caching values in expressions 255 * by introducing sequence points into the in*() definitions. Note that 256 * __raw_* do not guarantee this behaviour. 257 * 258 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 259 */ 260 #ifdef __io 261 #define outb(v, p) __raw_writeb(v, __io(p)) 262 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 263 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 264 265 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 266 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 267 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 268 269 #define outsb(p, d, l) writesb(__io(p), d, l) 270 #define outsw(p, d, l) writesw(__io(p), d, l) 271 #define outsl(p, d, l) writesl(__io(p), d, l) 272 273 #define insb(p, d, l) readsb(__io(p), d, l) 274 #define insw(p, d, l) readsw(__io(p), d, l) 275 #define insl(p, d, l) readsl(__io(p), d, l) 276 277 static inline void readsb(unsigned int *addr, void *data, int bytelen) 278 { 279 unsigned char *ptr; 280 unsigned char *ptr2; 281 282 ptr = (unsigned char *)addr; 283 ptr2 = (unsigned char *)data; 284 285 while (bytelen) { 286 *ptr2 = *ptr; 287 ptr2++; 288 bytelen--; 289 } 290 } 291 292 static inline void readsw(unsigned int *addr, void *data, int wordlen) 293 { 294 unsigned short *ptr; 295 unsigned short *ptr2; 296 297 ptr = (unsigned short *)addr; 298 ptr2 = (unsigned short *)data; 299 300 while (wordlen) { 301 *ptr2 = *ptr; 302 ptr2++; 303 wordlen--; 304 } 305 } 306 307 static inline void readsl(unsigned int *addr, void *data, int longlen) 308 { 309 unsigned int *ptr; 310 unsigned int *ptr2; 311 312 ptr = (unsigned int *)addr; 313 ptr2 = (unsigned int *)data; 314 315 while (longlen) { 316 *ptr2 = *ptr; 317 ptr2++; 318 longlen--; 319 } 320 } 321 322 static inline void writesb(unsigned int *addr, const void *data, int bytelen) 323 { 324 unsigned char *ptr; 325 unsigned char *ptr2; 326 327 ptr = (unsigned char *)addr; 328 ptr2 = (unsigned char *)data; 329 330 while (bytelen) { 331 *ptr = *ptr2; 332 ptr2++; 333 bytelen--; 334 } 335 } 336 337 static inline void writesw(unsigned int *addr, const void *data, int wordlen) 338 { 339 unsigned short *ptr; 340 unsigned short *ptr2; 341 342 ptr = (unsigned short *)addr; 343 ptr2 = (unsigned short *)data; 344 345 while (wordlen) { 346 *ptr = *ptr2; 347 ptr2++; 348 wordlen--; 349 } 350 } 351 352 static inline void writesl(unsigned int *addr, const void *data, int longlen) 353 { 354 unsigned int *ptr; 355 unsigned int *ptr2; 356 357 ptr = (unsigned int *)addr; 358 ptr2 = (unsigned int *)data; 359 360 while (longlen) { 361 *ptr = *ptr2; 362 ptr2++; 363 longlen--; 364 } 365 } 366 #endif 367 368 #define outb_p(val, port) outb((val), (port)) 369 #define outw_p(val, port) outw((val), (port)) 370 #define outl_p(val, port) outl((val), (port)) 371 #define inb_p(port) inb((port)) 372 #define inw_p(port) inw((port)) 373 #define inl_p(port) inl((port)) 374 375 #define outsb_p(port, from, len) outsb(port, from, len) 376 #define outsw_p(port, from, len) outsw(port, from, len) 377 #define outsl_p(port, from, len) outsl(port, from, len) 378 #define insb_p(port, to, len) insb(port, to, len) 379 #define insw_p(port, to, len) insw(port, to, len) 380 #define insl_p(port, to, len) insl(port, to, len) 381 382 /* 383 * DMA-consistent mapping functions. These allocate/free a region of 384 * uncached, unwrite-buffered mapped memory space for use with DMA 385 * devices. This is the "generic" version. The PCI specific version 386 * is in pci.h 387 */ 388 389 /* 390 * String version of IO memory access ops: 391 */ 392 393 /* 394 * If this architecture has PCI memory IO, then define the read/write 395 * macros. These should only be used with the cookie passed from 396 * ioremap. 397 */ 398 #ifdef __mem_pci 399 400 #define readb(c) ({ unsigned int __v = \ 401 __raw_readb(__mem_pci(c)); __v; }) 402 #define readw(c) ({ unsigned int __v = \ 403 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 404 #define readl(c) ({ unsigned int __v = \ 405 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 406 407 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 408 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 409 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 410 411 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 412 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 413 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 414 415 #define eth_io_copy_and_sum(s, c, l, b) \ 416 eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 417 418 static inline int check_signature(ulong io_addr, const uchar *s, int len) 419 { 420 int retval = 0; 421 422 do { 423 if (readb(io_addr) != *s) 424 goto out; 425 io_addr++; 426 s++; 427 len--; 428 } while (len); 429 retval = 1; 430 out: 431 return retval; 432 } 433 #endif /* __mem_pci */ 434 435 /* 436 * If this architecture has ISA IO, then define the isa_read/isa_write 437 * macros. 438 */ 439 #ifdef __mem_isa 440 441 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 442 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 443 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 444 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 445 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 446 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 447 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 448 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 449 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 450 451 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 452 eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 453 454 static inline int 455 isa_check_signature(ulong io_addr, const uchar *s, int len) 456 { 457 int retval = 0; 458 459 do { 460 if (isa_readb(io_addr) != *s) 461 goto out; 462 io_addr++; 463 s++; 464 len--; 465 } while (len); 466 retval = 1; 467 out: 468 return retval; 469 } 470 471 #else /* __mem_isa */ 472 473 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 474 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 475 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 476 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 477 #define isa_writew(val, addr) __readwrite_bug("isa_writew") 478 #define isa_writel(val, addr) __readwrite_bug("isa_writel") 479 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 480 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 481 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 482 483 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 484 __readwrite_bug("isa_eth_io_copy_and_sum") 485 486 #define isa_check_signature(io, sig, len) (0) 487 488 #endif /* __mem_isa */ 489 #endif /* __KERNEL__ */ 490 #endif /* __ASM_RISCV_IO_H */ 491