1*6020faf6SRick Chen /* 2*6020faf6SRick Chen * linux/include/asm-arm/byteorder.h 3*6020faf6SRick Chen * 4*6020faf6SRick Chen * Copyright (C) 2017 Andes Technology Corporation 5*6020faf6SRick Chen * Rick Chen, Andes Technology Corporation <rick@andestech.com> 6*6020faf6SRick Chen * 7*6020faf6SRick Chen * ARM Endian-ness. In little endian mode, the data bus is connected such 8*6020faf6SRick Chen * that byte accesses appear as: 9*6020faf6SRick Chen * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 10*6020faf6SRick Chen * and word accesses (data or instruction) appear as: 11*6020faf6SRick Chen * d0...d31 12*6020faf6SRick Chen * 13*6020faf6SRick Chen * When in big endian mode, byte accesses appear as: 14*6020faf6SRick Chen * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7 15*6020faf6SRick Chen * and word accesses (data or instruction) appear as: 16*6020faf6SRick Chen * d0...d31 17*6020faf6SRick Chen */ 18*6020faf6SRick Chen 19*6020faf6SRick Chen #ifndef __ASM_RISCV_BYTEORDER_H 20*6020faf6SRick Chen #define __ASM_RISCV_BYTEORDER_H 21*6020faf6SRick Chen 22*6020faf6SRick Chen #include <asm/types.h> 23*6020faf6SRick Chen 24*6020faf6SRick Chen #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 25*6020faf6SRick Chen # define __BYTEORDER_HAS_U64__ 26*6020faf6SRick Chen # define __SWAB_64_THRU_32__ 27*6020faf6SRick Chen #endif 28*6020faf6SRick Chen 29*6020faf6SRick Chen #ifdef __RISCVEB__ 30*6020faf6SRick Chen #include <linux/byteorder/big_endian.h> 31*6020faf6SRick Chen #else 32*6020faf6SRick Chen #include <linux/byteorder/little_endian.h> 33*6020faf6SRick Chen #endif 34*6020faf6SRick Chen 35*6020faf6SRick Chen #endif 36