xref: /openbmc/u-boot/arch/riscv/cpu/cpu.c (revision e11ef3d2)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
4  */
5 
6 #include <common.h>
7 #include <asm/csr.h>
8 
9 /*
10  * prior_stage_fdt_address must be stored in the data section since it is used
11  * before the bss section is available.
12  */
13 phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
14 
15 enum {
16 	ISA_INVALID = 0,
17 	ISA_32BIT,
18 	ISA_64BIT,
19 	ISA_128BIT
20 };
21 
22 static const char * const isa_bits[] = {
23 	[ISA_INVALID] = NULL,
24 	[ISA_32BIT]   = "32",
25 	[ISA_64BIT]   = "64",
26 	[ISA_128BIT]  = "128"
27 };
28 
29 static inline bool supports_extension(char ext)
30 {
31 	return csr_read(misa) & (1 << (ext - 'a'));
32 }
33 
34 int print_cpuinfo(void)
35 {
36 	char name[32];
37 	char *s = name;
38 	int bit;
39 
40 	s += sprintf(name, "rv");
41 	bit = csr_read(misa) >> (sizeof(long) * 8 - 2);
42 	s += sprintf(s, isa_bits[bit]);
43 
44 	supports_extension('i') ? *s++ = 'i' : 'r';
45 	supports_extension('m') ? *s++ = 'm' : 'i';
46 	supports_extension('a') ? *s++ = 'a' : 's';
47 	supports_extension('f') ? *s++ = 'f' : 'c';
48 	supports_extension('d') ? *s++ = 'd' : '-';
49 	supports_extension('c') ? *s++ = 'c' : 'v';
50 	*s++ = '\0';
51 
52 	printf("CPU:   %s\n", name);
53 
54 	return 0;
55 }
56