1117a433dSBin Mengmenu "RISC-V architecture" 2f94c44e5SRick Chen depends on RISCV 3f94c44e5SRick Chen 4f94c44e5SRick Chenconfig SYS_ARCH 5f94c44e5SRick Chen default "riscv" 6f94c44e5SRick Chen 7f94c44e5SRick Chenchoice 8f94c44e5SRick Chen prompt "Target select" 9f94c44e5SRick Chen optional 10f94c44e5SRick Chen 116f4dd62fSRick Chenconfig TARGET_AX25_AE350 126f4dd62fSRick Chen bool "Support ax25-ae350" 13f94c44e5SRick Chen 14510e379cSBin Mengconfig TARGET_QEMU_VIRT 15510e379cSBin Meng bool "Support QEMU Virt Board" 16510e379cSBin Meng 17f94c44e5SRick Chenendchoice 18f94c44e5SRick Chen 1952923c6dSRick Chen# board-specific options below 206f4dd62fSRick Chensource "board/AndesTech/ax25-ae350/Kconfig" 21510e379cSBin Mengsource "board/emulation/qemu-riscv/Kconfig" 22f94c44e5SRick Chen 2352923c6dSRick Chen# platform-specific options below 2452923c6dSRick Chensource "arch/riscv/cpu/ax25/Kconfig" 2552923c6dSRick Chen 2652923c6dSRick Chen# architecture-specific options below 2752923c6dSRick Chen 28f94c44e5SRick Chenchoice 29862e2e75SLukas Auer prompt "Base ISA" 30862e2e75SLukas Auer default ARCH_RV32I 31f94c44e5SRick Chen 32862e2e75SLukas Auerconfig ARCH_RV32I 33862e2e75SLukas Auer bool "RV32I" 34f94c44e5SRick Chen select 32BIT 35f94c44e5SRick Chen help 36862e2e75SLukas Auer Choose this option to target the RV32I base integer instruction set. 37f94c44e5SRick Chen 38862e2e75SLukas Auerconfig ARCH_RV64I 39862e2e75SLukas Auer bool "RV64I" 40f94c44e5SRick Chen select 64BIT 4171158564SLukas Auer select PHYS_64BIT 42f94c44e5SRick Chen help 43862e2e75SLukas Auer Choose this option to target the RV64I base integer instruction set. 44f94c44e5SRick Chen 45f94c44e5SRick Chenendchoice 46f94c44e5SRick Chen 47d57ffa65SLukas Auerconfig RISCV_ISA_C 48d57ffa65SLukas Auer bool "Emit compressed instructions" 49d57ffa65SLukas Auer default y 50d57ffa65SLukas Auer help 51d57ffa65SLukas Auer Adds "C" to the ISA subsets that the toolchain is allowed to emit 52d57ffa65SLukas Auer when building U-Boot, which results in compressed instructions in the 53d57ffa65SLukas Auer U-Boot binary. 54d57ffa65SLukas Auer 55d57ffa65SLukas Auerconfig RISCV_ISA_A 56d57ffa65SLukas Auer def_bool y 57d57ffa65SLukas Auer 58*d2db2a8fSAnup Patelconfig RISCV_SMODE 59*d2db2a8fSAnup Patel bool "Run in S-Mode" 60*d2db2a8fSAnup Patel help 61*d2db2a8fSAnup Patel Enable this option to build U-Boot for RISC-V S-Mode 62*d2db2a8fSAnup Patel 63f94c44e5SRick Chenconfig 32BIT 64f94c44e5SRick Chen bool 65f94c44e5SRick Chen 66f94c44e5SRick Chenconfig 64BIT 67f94c44e5SRick Chen bool 68f94c44e5SRick Chen 69f94c44e5SRick Chenendmenu 70