1/* 2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net> 3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se> 4 * Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de> 5 * Copyright Freescale Semiconductor, Inc. 2004, 2006. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#include <config.h> 11#include <ppc_asm.tmpl> 12 13/*------------------------------------------------------------------------------- */ 14/* Function: ppcDcbf */ 15/* Description: Data Cache block flush */ 16/* Input: r3 = effective address */ 17/* Output: none. */ 18/*------------------------------------------------------------------------------- */ 19 .globl ppcDcbf 20ppcDcbf: 21 dcbf r0,r3 22 blr 23 24/*------------------------------------------------------------------------------- */ 25/* Function: ppcDcbi */ 26/* Description: Data Cache block Invalidate */ 27/* Input: r3 = effective address */ 28/* Output: none. */ 29/*------------------------------------------------------------------------------- */ 30 .globl ppcDcbi 31ppcDcbi: 32 dcbi r0,r3 33 blr 34 35/*-------------------------------------------------------------------------- 36 * Function: ppcDcbz 37 * Description: Data Cache block zero. 38 * Input: r3 = effective address 39 * Output: none. 40 *-------------------------------------------------------------------------- */ 41 42 .globl ppcDcbz 43ppcDcbz: 44 dcbz r0,r3 45 blr 46 47/*------------------------------------------------------------------------------- */ 48/* Function: ppcSync */ 49/* Description: Processor Synchronize */ 50/* Input: none. */ 51/* Output: none. */ 52/*------------------------------------------------------------------------------- */ 53 .globl ppcSync 54ppcSync: 55 sync 56 blr 57