xref: /openbmc/u-boot/arch/powerpc/lib/ppccache.S (revision c6af2e7d)
1/*
2 * Copyright (C) 1998  Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
5 * Copyright Freescale Semiconductor, Inc. 2004, 2006.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <ppc_asm.tmpl>
28
29/*------------------------------------------------------------------------------- */
30/* Function:	 ppcDcbf */
31/* Description:	 Data Cache block flush */
32/* Input:	 r3 = effective address */
33/* Output:	 none. */
34/*------------------------------------------------------------------------------- */
35	.globl	ppcDcbf
36ppcDcbf:
37	dcbf	r0,r3
38	blr
39
40/*------------------------------------------------------------------------------- */
41/* Function:	 ppcDcbi */
42/* Description:	 Data Cache block Invalidate */
43/* Input:	 r3 = effective address */
44/* Output:	 none. */
45/*------------------------------------------------------------------------------- */
46	.globl	ppcDcbi
47ppcDcbi:
48	dcbi	r0,r3
49	blr
50
51/*--------------------------------------------------------------------------
52 * Function:	 ppcDcbz
53 * Description:	 Data Cache block zero.
54 * Input:	 r3 = effective address
55 * Output:	 none.
56 *-------------------------------------------------------------------------- */
57
58	.globl	ppcDcbz
59ppcDcbz:
60	dcbz	r0,r3
61	blr
62
63/*------------------------------------------------------------------------------- */
64/* Function:	 ppcSync */
65/* Description:	 Processor Synchronize */
66/* Input:	 none. */
67/* Output:	 none. */
68/*------------------------------------------------------------------------------- */
69	.globl	ppcSync
70ppcSync:
71	sync
72	blr
73