xref: /openbmc/u-boot/arch/powerpc/lib/cache.c (revision cbd2fba1)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2002
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  */
6 
7 #include <common.h>
8 #include <asm/cache.h>
9 #include <watchdog.h>
10 
11 void flush_cache(ulong start_addr, ulong size)
12 {
13 #ifndef CONFIG_5xx
14 	ulong addr, start, end;
15 
16 	start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
17 	end = start_addr + size - 1;
18 
19 	for (addr = start; (addr <= end) && (addr >= start);
20 			addr += CONFIG_SYS_CACHELINE_SIZE) {
21 		asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
22 		WATCHDOG_RESET();
23 	}
24 	/* wait for all dcbst to complete on bus */
25 	asm volatile("sync" : : : "memory");
26 
27 	for (addr = start; (addr <= end) && (addr >= start);
28 			addr += CONFIG_SYS_CACHELINE_SIZE) {
29 		asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
30 		WATCHDOG_RESET();
31 	}
32 	asm volatile("sync" : : : "memory");
33 	/* flush prefetch queue */
34 	asm volatile("isync" : : : "memory");
35 #endif
36 }
37