1 /* 2 * (C) Copyright 2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/cache.h> 10 #include <watchdog.h> 11 12 void flush_cache(ulong start_addr, ulong size) 13 { 14 #ifndef CONFIG_5xx 15 ulong addr, start, end; 16 17 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); 18 end = start_addr + size - 1; 19 20 for (addr = start; (addr <= end) && (addr >= start); 21 addr += CONFIG_SYS_CACHELINE_SIZE) { 22 asm volatile("dcbst 0,%0" : : "r" (addr) : "memory"); 23 WATCHDOG_RESET(); 24 } 25 /* wait for all dcbst to complete on bus */ 26 asm volatile("sync" : : : "memory"); 27 28 for (addr = start; (addr <= end) && (addr >= start); 29 addr += CONFIG_SYS_CACHELINE_SIZE) { 30 asm volatile("icbi 0,%0" : : "r" (addr) : "memory"); 31 WATCHDOG_RESET(); 32 } 33 asm volatile("sync" : : : "memory"); 34 /* flush prefetch queue */ 35 asm volatile("isync" : : : "memory"); 36 #endif 37 } 38