1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2002 4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 5 */ 6 7 #include <common.h> 8 #include <asm/processor.h> 9 #include <asm/mmu.h> 10 #include <asm/io.h> 11 #include <linux/compiler.h> 12 13 #ifdef CONFIG_ADDR_MAP 14 #include <addr_map.h> 15 #endif 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) 20 { 21 __maybe_unused int batn = -1; 22 23 sync(); 24 25 switch (bat) { 26 case DBAT0: 27 mtspr (DBAT0L, lower); 28 mtspr (DBAT0U, upper); 29 batn = 0; 30 break; 31 case IBAT0: 32 mtspr (IBAT0L, lower); 33 mtspr (IBAT0U, upper); 34 break; 35 case DBAT1: 36 mtspr (DBAT1L, lower); 37 mtspr (DBAT1U, upper); 38 batn = 1; 39 break; 40 case IBAT1: 41 mtspr (IBAT1L, lower); 42 mtspr (IBAT1U, upper); 43 break; 44 case DBAT2: 45 mtspr (DBAT2L, lower); 46 mtspr (DBAT2U, upper); 47 batn = 2; 48 break; 49 case IBAT2: 50 mtspr (IBAT2L, lower); 51 mtspr (IBAT2U, upper); 52 break; 53 case DBAT3: 54 mtspr (DBAT3L, lower); 55 mtspr (DBAT3U, upper); 56 batn = 3; 57 break; 58 case IBAT3: 59 mtspr (IBAT3L, lower); 60 mtspr (IBAT3U, upper); 61 break; 62 #ifdef CONFIG_HIGH_BATS 63 case DBAT4: 64 mtspr (DBAT4L, lower); 65 mtspr (DBAT4U, upper); 66 batn = 4; 67 break; 68 case IBAT4: 69 mtspr (IBAT4L, lower); 70 mtspr (IBAT4U, upper); 71 break; 72 case DBAT5: 73 mtspr (DBAT5L, lower); 74 mtspr (DBAT5U, upper); 75 batn = 5; 76 break; 77 case IBAT5: 78 mtspr (IBAT5L, lower); 79 mtspr (IBAT5U, upper); 80 break; 81 case DBAT6: 82 mtspr (DBAT6L, lower); 83 mtspr (DBAT6U, upper); 84 batn = 6; 85 break; 86 case IBAT6: 87 mtspr (IBAT6L, lower); 88 mtspr (IBAT6U, upper); 89 break; 90 case DBAT7: 91 mtspr (DBAT7L, lower); 92 mtspr (DBAT7U, upper); 93 batn = 7; 94 break; 95 case IBAT7: 96 mtspr (IBAT7L, lower); 97 mtspr (IBAT7U, upper); 98 break; 99 #endif 100 default: 101 return (-1); 102 } 103 104 #ifdef CONFIG_ADDR_MAP 105 if ((gd->flags & GD_FLG_RELOC) && (batn >= 0)) { 106 phys_size_t size; 107 if (!BATU_VALID(upper)) 108 size = 0; 109 else 110 size = BATU_SIZE(upper); 111 addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), 112 size, batn); 113 } 114 #endif 115 116 sync(); 117 isync(); 118 119 return (0); 120 } 121 122 int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower) 123 { 124 unsigned long register u; 125 unsigned long register l; 126 127 switch (bat) { 128 case DBAT0: 129 l = mfspr (DBAT0L); 130 u = mfspr (DBAT0U); 131 break; 132 case IBAT0: 133 l = mfspr (IBAT0L); 134 u = mfspr (IBAT0U); 135 break; 136 case DBAT1: 137 l = mfspr (DBAT1L); 138 u = mfspr (DBAT1U); 139 break; 140 case IBAT1: 141 l = mfspr (IBAT1L); 142 u = mfspr (IBAT1U); 143 break; 144 case DBAT2: 145 l = mfspr (DBAT2L); 146 u = mfspr (DBAT2U); 147 break; 148 case IBAT2: 149 l = mfspr (IBAT2L); 150 u = mfspr (IBAT2U); 151 break; 152 case DBAT3: 153 l = mfspr (DBAT3L); 154 u = mfspr (DBAT3U); 155 break; 156 case IBAT3: 157 l = mfspr (IBAT3L); 158 u = mfspr (IBAT3U); 159 break; 160 #ifdef CONFIG_HIGH_BATS 161 case DBAT4: 162 l = mfspr (DBAT4L); 163 u = mfspr (DBAT4U); 164 break; 165 case IBAT4: 166 l = mfspr (IBAT4L); 167 u = mfspr (IBAT4U); 168 break; 169 case DBAT5: 170 l = mfspr (DBAT5L); 171 u = mfspr (DBAT5U); 172 break; 173 case IBAT5: 174 l = mfspr (IBAT5L); 175 u = mfspr (IBAT5U); 176 break; 177 case DBAT6: 178 l = mfspr (DBAT6L); 179 u = mfspr (DBAT6U); 180 break; 181 case IBAT6: 182 l = mfspr (IBAT6L); 183 u = mfspr (IBAT6U); 184 break; 185 case DBAT7: 186 l = mfspr (DBAT7L); 187 u = mfspr (DBAT7U); 188 break; 189 case IBAT7: 190 l = mfspr (IBAT7L); 191 u = mfspr (IBAT7U); 192 break; 193 #endif 194 default: 195 return (-1); 196 } 197 198 *upper = u; 199 *lower = l; 200 201 return (0); 202 } 203 204 void print_bats(void) 205 { 206 printf("BAT registers:\n"); 207 208 printf ("\tIBAT0L = 0x%08X ", mfspr (IBAT0L)); 209 printf ("\tIBAT0U = 0x%08X\n", mfspr (IBAT0U)); 210 printf ("\tDBAT0L = 0x%08X ", mfspr (DBAT0L)); 211 printf ("\tDBAT0U = 0x%08X\n", mfspr (DBAT0U)); 212 printf ("\tIBAT1L = 0x%08X ", mfspr (IBAT1L)); 213 printf ("\tIBAT1U = 0x%08X\n", mfspr (IBAT1U)); 214 printf ("\tDBAT1L = 0x%08X ", mfspr (DBAT1L)); 215 printf ("\tDBAT1U = 0x%08X\n", mfspr (DBAT1U)); 216 printf ("\tIBAT2L = 0x%08X ", mfspr (IBAT2L)); 217 printf ("\tIBAT2U = 0x%08X\n", mfspr (IBAT2U)); 218 printf ("\tDBAT2L = 0x%08X ", mfspr (DBAT2L)); 219 printf ("\tDBAT2U = 0x%08X\n", mfspr (DBAT2U)); 220 printf ("\tIBAT3L = 0x%08X ", mfspr (IBAT3L)); 221 printf ("\tIBAT3U = 0x%08X\n", mfspr (IBAT3U)); 222 printf ("\tDBAT3L = 0x%08X ", mfspr (DBAT3L)); 223 printf ("\tDBAT3U = 0x%08X\n", mfspr (DBAT3U)); 224 225 #ifdef CONFIG_HIGH_BATS 226 printf ("\tIBAT4L = 0x%08X ", mfspr (IBAT4L)); 227 printf ("\tIBAT4U = 0x%08X\n", mfspr (IBAT4U)); 228 printf ("\tDBAT4L = 0x%08X ", mfspr (DBAT4L)); 229 printf ("\tDBAT4U = 0x%08X\n", mfspr (DBAT4U)); 230 printf ("\tIBAT5L = 0x%08X ", mfspr (IBAT5L)); 231 printf ("\tIBAT5U = 0x%08X\n", mfspr (IBAT5U)); 232 printf ("\tDBAT5L = 0x%08X ", mfspr (DBAT5L)); 233 printf ("\tDBAT5U = 0x%08X\n", mfspr (DBAT5U)); 234 printf ("\tIBAT6L = 0x%08X ", mfspr (IBAT6L)); 235 printf ("\tIBAT6U = 0x%08X\n", mfspr (IBAT6U)); 236 printf ("\tDBAT6L = 0x%08X ", mfspr (DBAT6L)); 237 printf ("\tDBAT6U = 0x%08X\n", mfspr (DBAT6U)); 238 printf ("\tIBAT7L = 0x%08X ", mfspr (IBAT7L)); 239 printf ("\tIBAT7U = 0x%08X\n", mfspr (IBAT7U)); 240 printf ("\tDBAT7L = 0x%08X ", mfspr (DBAT7L)); 241 printf ("\tDBAT7U = 0x%08X\n", mfspr (DBAT7U)); 242 #endif 243 } 244