xref: /openbmc/u-boot/arch/powerpc/lib/_ashldi3.S (revision 8a23fc9c)
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
4 * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
5 * known as 2.6.38-rc5).  The source file copyrights are as follows:
6 *
7 * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras.
11 */
12
13#include <ppc_asm.tmpl>
14#include <ppc_defs.h>
15#include <config.h>
16
17/*
18 * Extended precision shifts.
19 *
20 * Updated to be valid for shift counts from 0 to 63 inclusive.
21 * -- Gabriel
22 *
23 * R3/R4 has 64 bit value
24 * R5    has shift count
25 * result in R3/R4
26 *
27 *  ashrdi3: arithmetic right shift (sign propagation)
28 *  lshrdi3: logical right shift
29 *  ashldi3: left shift
30 */
31	.globl __ashldi3
32__ashldi3:
33	subfic	r6,r5,32
34	slw	r3,r3,r5	# MSW = count > 31 ? 0 : MSW << count
35	addi	r7,r5,32	# could be xori, or addi with -32
36	srw	r6,r4,r6	# t1 = count > 31 ? 0 : LSW >> (32-count)
37	slw	r7,r4,r7	# t2 = count < 32 ? 0 : LSW << (count-32)
38	or	r3,r3,r6	# MSW |= t1
39	slw	r4,r4,r5	# LSW = LSW << count
40	or	r3,r3,r7	# MSW |= t2
41	blr
42