1 /* 2 * (C) Copyright 2002-2010 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_GBL_DATA_H 9 #define __ASM_GBL_DATA_H 10 11 #include "config.h" 12 #include "asm/types.h" 13 14 /* Architecture-specific global data */ 15 struct arch_global_data { 16 #if defined(CONFIG_FSL_ESDHC) 17 u32 sdhc_clk; 18 #if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) 19 u8 sdhc_adapter; 20 #endif 21 #endif 22 #if defined(CONFIG_CPM2) 23 /* There are many clocks on the MPC8260 - see page 9-5 */ 24 unsigned long vco_out; 25 unsigned long cpm_clk; 26 unsigned long scc_clk; 27 unsigned long brg_clk; 28 #endif 29 /* TODO: sjg@chromium.org: Should these be unslgned long? */ 30 #if defined(CONFIG_MPC83xx) 31 /* There are other clocks in the MPC83XX */ 32 u32 csb_clk; 33 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 34 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 35 u32 tsec1_clk; 36 u32 tsec2_clk; 37 u32 usbdr_clk; 38 # elif defined(CONFIG_MPC8309) 39 u32 usbdr_clk; 40 # endif 41 # if defined(CONFIG_MPC834x) 42 u32 usbmph_clk; 43 # endif /* CONFIG_MPC834x */ 44 # if defined(CONFIG_MPC8315) 45 u32 tdm_clk; 46 # endif 47 u32 core_clk; 48 u32 enc_clk; 49 u32 lbiu_clk; 50 u32 lclk_clk; 51 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 52 defined(CONFIG_MPC837x) 53 u32 pciexp1_clk; 54 u32 pciexp2_clk; 55 # endif 56 # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 57 u32 sata_clk; 58 # endif 59 # if defined(CONFIG_MPC8360) 60 u32 mem_sec_clk; 61 # endif /* CONFIG_MPC8360 */ 62 #endif 63 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 64 u32 lbc_clk; 65 void *cpu; 66 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 67 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 68 defined(CONFIG_MPC86xx) 69 u32 i2c1_clk; 70 u32 i2c2_clk; 71 #endif 72 #if defined(CONFIG_QE) 73 u32 qe_clk; 74 u32 brg_clk; 75 uint mp_alloc_base; 76 uint mp_alloc_top; 77 #endif /* CONFIG_QE */ 78 #if defined(CONFIG_FSL_LAW) 79 u32 used_laws; 80 #endif 81 #if defined(CONFIG_E500) 82 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 83 #endif 84 unsigned long reset_status; /* reset status register at boot */ 85 #if defined(CONFIG_MPC83xx) 86 unsigned long arbiter_event_attributes; 87 unsigned long arbiter_event_address; 88 #endif 89 #if defined(CONFIG_CPM2) 90 unsigned int dp_alloc_base; 91 unsigned int dp_alloc_top; 92 #endif 93 #if defined(CONFIG_4xx) 94 u32 uart_clk; 95 #endif /* CONFIG_4xx */ 96 #ifdef CONFIG_SYS_FPGA_COUNT 97 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 98 #endif 99 #if defined(CONFIG_WD_MAX_RATE) 100 unsigned long long wdt_last; /* trace watch-dog triggering rate */ 101 #endif 102 #if defined(CONFIG_LWMON5) 103 unsigned long kbd_status; 104 #endif 105 }; 106 107 #include <asm-generic/global_data.h> 108 109 #if 1 110 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 111 #else /* We could use plain global data, but the resulting code is bigger */ 112 #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 113 #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 114 gd_t *gd 115 #endif 116 117 #endif /* __ASM_GBL_DATA_H */ 118