1 /* 2 * (C) Copyright 2002-2010 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_GBL_DATA_H 9 #define __ASM_GBL_DATA_H 10 11 #include "config.h" 12 #include "asm/types.h" 13 14 /* Architecture-specific global data */ 15 struct arch_global_data { 16 #if defined(CONFIG_FSL_ESDHC) 17 u32 sdhc_clk; 18 #if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) 19 u8 sdhc_adapter; 20 #endif 21 #endif 22 #if defined(CONFIG_8xx) 23 unsigned long brg_clk; 24 #endif 25 #if defined(CONFIG_CPM2) 26 /* There are many clocks on the MPC8260 - see page 9-5 */ 27 unsigned long vco_out; 28 unsigned long cpm_clk; 29 unsigned long scc_clk; 30 unsigned long brg_clk; 31 #endif 32 /* TODO: sjg@chromium.org: Should these be unslgned long? */ 33 #if defined(CONFIG_MPC83xx) 34 /* There are other clocks in the MPC83XX */ 35 u32 csb_clk; 36 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 37 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 38 u32 tsec1_clk; 39 u32 tsec2_clk; 40 u32 usbdr_clk; 41 # elif defined(CONFIG_MPC8309) 42 u32 usbdr_clk; 43 # endif 44 # if defined(CONFIG_MPC834x) 45 u32 usbmph_clk; 46 # endif /* CONFIG_MPC834x */ 47 # if defined(CONFIG_MPC8315) 48 u32 tdm_clk; 49 # endif 50 u32 core_clk; 51 u32 enc_clk; 52 u32 lbiu_clk; 53 u32 lclk_clk; 54 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 55 defined(CONFIG_MPC837x) 56 u32 pciexp1_clk; 57 u32 pciexp2_clk; 58 # endif 59 # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 60 u32 sata_clk; 61 # endif 62 # if defined(CONFIG_MPC8360) 63 u32 mem_sec_clk; 64 # endif /* CONFIG_MPC8360 */ 65 #endif 66 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 67 u32 lbc_clk; 68 void *cpu; 69 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 70 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 71 defined(CONFIG_MPC86xx) 72 u32 i2c1_clk; 73 u32 i2c2_clk; 74 #endif 75 #if defined(CONFIG_QE) 76 u32 qe_clk; 77 u32 brg_clk; 78 uint mp_alloc_base; 79 uint mp_alloc_top; 80 #endif /* CONFIG_QE */ 81 #if defined(CONFIG_FSL_LAW) 82 u32 used_laws; 83 #endif 84 #if defined(CONFIG_E500) 85 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 86 #endif 87 unsigned long reset_status; /* reset status register at boot */ 88 #if defined(CONFIG_MPC83xx) 89 unsigned long arbiter_event_attributes; 90 unsigned long arbiter_event_address; 91 #endif 92 #if defined(CONFIG_CPM2) 93 unsigned int dp_alloc_base; 94 unsigned int dp_alloc_top; 95 #endif 96 #ifdef CONFIG_SYS_FPGA_COUNT 97 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 98 #endif 99 #if defined(CONFIG_WD_MAX_RATE) 100 unsigned long long wdt_last; /* trace watch-dog triggering rate */ 101 #endif 102 #if defined(CONFIG_LWMON5) 103 unsigned long kbd_status; 104 #endif 105 }; 106 107 #include <asm-generic/global_data.h> 108 109 #if 1 110 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 111 #else /* We could use plain global data, but the resulting code is bigger */ 112 #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 113 #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 114 gd_t *gd 115 #endif 116 117 #endif /* __ASM_GBL_DATA_H */ 118