17065b7d4SRuchika Gupta /* 27065b7d4SRuchika Gupta * Copyright 2010-2011 Freescale Semiconductor, Inc. 37065b7d4SRuchika Gupta * 41a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 57065b7d4SRuchika Gupta */ 67065b7d4SRuchika Gupta 77065b7d4SRuchika Gupta #ifndef __FSL_SECURE_BOOT_H 87065b7d4SRuchika Gupta #define __FSL_SECURE_BOOT_H 9e04916a7Sgaurav rana #include <asm/config_mpc85xx.h> 10e04916a7Sgaurav rana 11e04916a7Sgaurav rana #ifdef CONFIG_SECURE_BOOT 12bdc22074SAneesh Bansal 13bdc22074SAneesh Bansal #ifndef CONFIG_FIT_SIGNATURE 14bdc22074SAneesh Bansal #define CONFIG_CHAIN_OF_TRUST 15e04916a7Sgaurav rana #endif 167065b7d4SRuchika Gupta 177065b7d4SRuchika Gupta #if defined(CONFIG_FSL_CORENET) 187065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 19a202b9f8SYork Sun #elif defined(CONFIG_TARGET_BSC9132QDS) 20f978f7c2SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 21ebccf255SYork Sun #elif defined(CONFIG_TARGET_C29XPCIE) 22b3f0f632SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 237065b7d4SRuchika Gupta #else 247065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 257065b7d4SRuchika Gupta #endif 267065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 277065b7d4SRuchika Gupta 28*d46a4a13SYork Sun #if defined(CONFIG_TARGET_B4860QDS) || \ 29*d46a4a13SYork Sun defined(CONFIG_TARGET_B4420QDS) || \ 30ca4819dfSAneesh Bansal defined(CONFIG_T4240QDS) || \ 312d8db6d3SAneesh Bansal defined(CONFIG_T2080QDS) || \ 32e47c2a68SAneesh Bansal defined(CONFIG_T2080RDB) || \ 332d8db6d3SAneesh Bansal defined(CONFIG_T1040QDS) || \ 34e622d9edSgaurav rana defined(CONFIG_T104xD4QDS) || \ 35f6050790SShengzhou Liu defined(CONFIG_T104xRDB) || \ 36e622d9edSgaurav rana defined(CONFIG_T104xD4RDB) || \ 37f6050790SShengzhou Liu defined(CONFIG_PPC_T1023) || \ 38f6050790SShengzhou Liu defined(CONFIG_PPC_T1024) 39aa36c84eSSumit Garg #ifndef CONFIG_SYS_RAMBOOT 40fb4a2409SAneesh Bansal #define CONFIG_SYS_CPC_REINIT_F 41aa36c84eSSumit Garg #endif 42e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION 43fb4a2409SAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR 44fb4a2409SAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 45fb4a2409SAneesh Bansal #endif 46fb4a2409SAneesh Bansal 47467a40dfSAneesh Bansal #if defined(CONFIG_RAMBOOT_PBL) 48467a40dfSAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR 49aa36c84eSSumit Garg #ifdef CONFIG_SYS_INIT_L3_VADDR 50aa36c84eSSumit Garg #define CONFIG_SYS_INIT_L3_ADDR \ 51aa36c84eSSumit Garg (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \ 52aa36c84eSSumit Garg 0xbff00000 53aa36c84eSSumit Garg #else 54467a40dfSAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 55467a40dfSAneesh Bansal #endif 56aa36c84eSSumit Garg #endif 57467a40dfSAneesh Bansal 58ebccf255SYork Sun #if defined(CONFIG_TARGET_C29XPCIE) 59e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION 60e04916a7Sgaurav rana #endif 61e04916a7Sgaurav rana 625e5fdd2dSYork Sun #if defined(CONFIG_ARCH_P3041) || \ 63e71372cbSYork Sun defined(CONFIG_ARCH_P4080) || \ 64cefe11cdSYork Sun defined(CONFIG_ARCH_P5020) || \ 6595390360SYork Sun defined(CONFIG_ARCH_P5040) || \ 66ce040c83SYork Sun defined(CONFIG_ARCH_P2041) 67e04916a7Sgaurav rana #define CONFIG_FSL_TRUST_ARCH_v1 68e04916a7Sgaurav rana #endif 69e04916a7Sgaurav rana 702ed948f4SAneesh Bansal #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) 71e04916a7Sgaurav rana /* The key used for verification of next level images 72e04916a7Sgaurav rana * is picked up from an Extension Table which has 73e04916a7Sgaurav rana * been verified by the ISBC (Internal Secure boot Code) 742ed948f4SAneesh Bansal * in boot ROM of the SoC. 752ed948f4SAneesh Bansal * The feature is only applicable in case of NOR boot and is 762ed948f4SAneesh Bansal * not applicable in case of RAMBOOT (NAND, SD, SPI). 77e04916a7Sgaurav rana */ 78e04916a7Sgaurav rana #define CONFIG_FSL_ISBC_KEY_EXT 79e04916a7Sgaurav rana #endif 80bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_SECURE_BOOT */ 81e04916a7Sgaurav rana 82bdc22074SAneesh Bansal #ifdef CONFIG_CHAIN_OF_TRUST 83b63f8a43SSimon Glass #ifdef CONFIG_SPL_BUILD 848f01397bSSumit Garg /* 858f01397bSSumit Garg * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init 868f01397bSSumit Garg * due to space crunch on CPC and thus malloc will not work. 878f01397bSSumit Garg */ 888f01397bSSumit Garg #define CONFIG_SPL_PPAACT_ADDR 0x2e000000 898f01397bSSumit Garg #define CONFIG_SPL_SPAACT_ADDR 0x2f000000 908f01397bSSumit Garg #define CONFIG_SPL_JR0_LIODN_S 454 918f01397bSSumit Garg #define CONFIG_SPL_JR0_LIODN_NS 458 928f01397bSSumit Garg /* 938f01397bSSumit Garg * Define the key hash for U-Boot here if public/private key pair used to 948f01397bSSumit Garg * sign U-boot are different from the SRK hash put in the fuse 958f01397bSSumit Garg * Example of defining KEY_HASH is 968f01397bSSumit Garg * #define CONFIG_SPL_UBOOT_KEY_HASH \ 978f01397bSSumit Garg * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 988f01397bSSumit Garg * else leave it defined as NULL 998f01397bSSumit Garg */ 1008f01397bSSumit Garg 1018f01397bSSumit Garg #define CONFIG_SPL_UBOOT_KEY_HASH NULL 1028f01397bSSumit Garg #endif /* ifdef CONFIG_SPL_BUILD */ 1038f01397bSSumit Garg 104bdc22074SAneesh Bansal #define CONFIG_CMD_ESBC_VALIDATE 105bdc22074SAneesh Bansal #define CONFIG_CMD_BLOB 106bdc22074SAneesh Bansal #define CONFIG_FSL_SEC_MON 107bdc22074SAneesh Bansal #define CONFIG_SHA_PROG_HW_ACCEL 108bdc22074SAneesh Bansal #define CONFIG_RSA_FREESCALE_EXP 109bdc22074SAneesh Bansal 110bdc22074SAneesh Bansal #ifndef CONFIG_FSL_CAAM 111bdc22074SAneesh Bansal #define CONFIG_FSL_CAAM 112bdc22074SAneesh Bansal #endif 113bdc22074SAneesh Bansal 1148f01397bSSumit Garg #ifndef CONFIG_SPL_BUILD 1158f01397bSSumit Garg /* 1168f01397bSSumit Garg * fsl_setenv_chain_of_trust() must be called from 117d0a6d7ceSAneesh Bansal * board_late_init() 118d0a6d7ceSAneesh Bansal */ 119d0a6d7ceSAneesh Bansal #ifndef CONFIG_BOARD_LATE_INIT 120d0a6d7ceSAneesh Bansal #define CONFIG_BOARD_LATE_INIT 121d0a6d7ceSAneesh Bansal #endif 122d0a6d7ceSAneesh Bansal 1235050f6f0SAneesh Bansal /* If Boot Script is not on NOR and is required to be copied on RAM */ 1245050f6f0SAneesh Bansal #ifdef CONFIG_BOOTSCRIPT_COPY_RAM 1255050f6f0SAneesh Bansal #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 12669d4b48cSSumit Garg #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 1275050f6f0SAneesh Bansal #define CONFIG_BS_HDR_SIZE 0x00002000 1285050f6f0SAneesh Bansal #define CONFIG_BS_ADDR_RAM 0x00012000 12969d4b48cSSumit Garg #define CONFIG_BS_ADDR_DEVICE 0x00802000 1305050f6f0SAneesh Bansal #define CONFIG_BS_SIZE 0x00001000 1315050f6f0SAneesh Bansal 1325050f6f0SAneesh Bansal #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM 1335050f6f0SAneesh Bansal #else 1345050f6f0SAneesh Bansal 13598cb0efdSgaurav rana /* The bootscript header address is different for B4860 because the NOR 13698cb0efdSgaurav rana * mapping is different on B4 due to reduced NOR size. 13798cb0efdSgaurav rana */ 138*d46a4a13SYork Sun #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS) 13998cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 14098cb0efdSgaurav rana #elif defined(CONFIG_FSL_CORENET) 14198cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000 142a202b9f8SYork Sun #elif defined(CONFIG_TARGET_BSC9132QDS) 14398cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000 144ebccf255SYork Sun #elif defined(CONFIG_TARGET_C29XPCIE) 14598cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000 14698cb0efdSgaurav rana #else 14798cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 14898cb0efdSgaurav rana #endif 14998cb0efdSgaurav rana 150bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ 1515050f6f0SAneesh Bansal 152bdc22074SAneesh Bansal #include <config_fsl_chain_trust.h> 1538f01397bSSumit Garg #endif /* #ifndef CONFIG_SPL_BUILD */ 154bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ 1550d2cff2dSPo Liu #endif 156