1 /* 2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _FSL_LIODN_H_ 8 #define _FSL_LIODN_H_ 9 10 #include <asm/types.h> 11 12 struct srio_liodn_id_table { 13 u32 id[2]; 14 unsigned long reg_offset[2]; 15 u8 num_ids; 16 u8 portid; 17 }; 18 #define SET_SRIO_LIODN_1(port, idA) \ 19 { .id = { idA }, .num_ids = 1, .portid = port, \ 20 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ 21 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ 22 } 23 24 #define SET_SRIO_LIODN_2(port, idA, idB) \ 25 { .id = { idA, idB }, .num_ids = 2, .portid = port, \ 26 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ 27 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ 28 .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \ 29 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ 30 } 31 32 #define SET_SRIO_LIODN_BASE(port, id_a) \ 33 { .id = { id_a }, .num_ids = 1, .portid = port, \ 34 .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \ 35 + (port - 1) * 0x200 \ 36 + CONFIG_SYS_FSL_SRIO_ADDR, \ 37 } 38 39 struct liodn_id_table { 40 const char * compat; 41 u32 id[2]; 42 u8 num_ids; 43 phys_addr_t compat_offset; 44 unsigned long reg_offset; 45 }; 46 47 struct fman_liodn_id_table { 48 /* Freescale FMan Device Tree binding was updated for FMan. 49 * We need to support both new and old compatibles in order not to 50 * break backward compatibility. 51 */ 52 const char *compat[2]; 53 u32 id[2]; 54 u8 num_ids; 55 phys_addr_t compat_offset; 56 unsigned long reg_offset; 57 }; 58 59 extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid); 60 extern void set_liodns(void); 61 extern void fdt_fixup_liodn(void *blob); 62 63 #define SET_LIODN_BASE_1(idA) \ 64 { .id = { idA }, .num_ids = 1, } 65 66 #define SET_LIODN_BASE_2(idA, idB) \ 67 { .id = { idA, idB }, .num_ids = 2 } 68 69 #define SET_FMAN_LIODN_ENTRY(name1, name2, idA, off, compatoff)\ 70 { .compat[0] = name1, \ 71 .compat[1] = name2, \ 72 .id = { idA }, .num_ids = 1, \ 73 .reg_offset = off + CONFIG_SYS_CCSRBAR, \ 74 .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ 75 } 76 77 #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \ 78 { .compat = name, \ 79 .id = { idA }, .num_ids = 1, \ 80 .reg_offset = off + CONFIG_SYS_CCSRBAR, \ 81 .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ 82 } 83 84 #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \ 85 { .compat = name, \ 86 .id = { idA, idB }, .num_ids = 2, \ 87 .reg_offset = off + CONFIG_SYS_CCSRBAR, \ 88 .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ 89 } 90 91 #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \ 92 SET_LIODN_ENTRY_1(compat, liodn, \ 93 offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \ 94 compatoff) 95 96 #define SET_USB_LIODN(usbNum, compat, liodn) \ 97 SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\ 98 CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET) 99 100 #define SET_SATA_LIODN(sataNum, liodn) \ 101 SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\ 102 CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET) 103 104 #define SET_PCI_LIODN(compat, pciNum, liodn) \ 105 SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\ 106 CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) 107 108 #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \ 109 SET_LIODN_ENTRY_1(compat, liodn,\ 110 offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\ 111 CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET) 112 113 /* reg nodes for DMA start @ 0x300 */ 114 #define SET_DMA_LIODN(dmaNum, compat, liodn) \ 115 SET_GUTS_LIODN(compat, liodn, dma##dmaNum##liodnr,\ 116 CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300) 117 118 #define SET_SDHC_LIODN(sdhcNum, liodn) \ 119 SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\ 120 CONFIG_SYS_MPC85xx_ESDHC_OFFSET) 121 122 #define SET_QE_LIODN(liodn) \ 123 SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\ 124 CONFIG_SYS_MPC85xx_QE_OFFSET) 125 126 #define SET_TDM_LIODN(liodn) \ 127 SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\ 128 CONFIG_SYS_MPC85xx_TDM_OFFSET) 129 130 #define SET_QMAN_LIODN(liodn) \ 131 SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \ 132 CONFIG_SYS_FSL_QMAN_OFFSET, \ 133 CONFIG_SYS_FSL_QMAN_OFFSET) 134 135 #define SET_BMAN_LIODN(liodn) \ 136 SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \ 137 CONFIG_SYS_FSL_BMAN_OFFSET, \ 138 CONFIG_SYS_FSL_BMAN_OFFSET) 139 140 #define SET_PME_LIODN(liodn) \ 141 SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \ 142 CONFIG_SYS_FSL_CORENET_PME_OFFSET, \ 143 CONFIG_SYS_FSL_CORENET_PME_OFFSET) 144 145 #define SET_PMAN_LIODN(num, liodn) \ 146 SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \ 147 offsetof(struct ccsr_pman, ppa1) + \ 148 CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \ 149 CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET) 150 151 /* -1 from portID due to how immap has the registers */ 152 #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \ 153 CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \ 154 offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1]) 155 156 #ifdef CONFIG_SYS_FMAN_V3 157 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */ 158 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \ 159 SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx", \ 160 liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \ 161 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) 162 163 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */ 164 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \ 165 SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \ 166 liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \ 167 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) 168 169 /* enetNum is 0, 1, 2... so we + 8 for type-2 10g to get to HW Port ID */ 170 #define SET_FMAN_RX_10G_TYPE2_LIODN(fmNum, enetNum, liodn) \ 171 SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \ 172 liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \ 173 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) 174 #else 175 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */ 176 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \ 177 SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-1g-rx", \ 178 liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \ 179 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) 180 181 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */ 182 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \ 183 SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-10g-rx", \ 184 liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \ 185 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) 186 #endif 187 /* 188 * handle both old and new versioned SEC properties: 189 * "fsl,secX.Y" became "fsl,sec-vX.Y" during development 190 */ 191 #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \ 192 SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\ 193 offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \ 194 CONFIG_SYS_FSL_SEC_OFFSET, \ 195 CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \ 196 SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\ 197 offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \ 198 CONFIG_SYS_FSL_SEC_OFFSET, \ 199 CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum) 200 201 /* This is a bit evil since we treat rtic param as both a string & hex value */ 202 #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \ 203 SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \ 204 liodnA, \ 205 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ 206 CONFIG_SYS_FSL_SEC_OFFSET, \ 207 CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \ 208 SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \ 209 liodnA, \ 210 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ 211 CONFIG_SYS_FSL_SEC_OFFSET, \ 212 CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)) 213 214 #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \ 215 SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \ 216 offsetof(ccsr_sec_t, decoliodnr[num].ls) + \ 217 CONFIG_SYS_FSL_SEC_OFFSET, 0) 218 219 #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \ 220 SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \ 221 liodnA, \ 222 offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \ 223 CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \ 224 offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \ 225 CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) 226 227 #define SET_RMAN_LIODN(ibNum, liodn) \ 228 SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \ 229 offsetof(struct ccsr_rman, mmitdr) + \ 230 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \ 231 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000) 232 233 extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[]; 234 extern struct liodn_id_table raide_liodn_tbl[]; 235 extern struct fman_liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[]; 236 #ifdef CONFIG_SYS_SRIO 237 extern struct srio_liodn_id_table srio_liodn_tbl[]; 238 extern int srio_liodn_tbl_sz; 239 #endif 240 extern struct liodn_id_table rman_liodn_tbl[]; 241 extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz; 242 extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz; 243 extern int rman_liodn_tbl_sz; 244 245 #endif 246