1 /*
2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _FSL_LIODN_H_
8 #define _FSL_LIODN_H_
9 
10 #include <asm/types.h>
11 #include <fsl_qbman.h>
12 
13 struct srio_liodn_id_table {
14 	u32 id[2];
15 	unsigned long reg_offset[2];
16 	u8 num_ids;
17 	u8 portid;
18 };
19 #define SET_SRIO_LIODN_1(port, idA) \
20 	{ .id = { idA }, .num_ids = 1, .portid = port, \
21 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
22 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
23 	}
24 
25 #define SET_SRIO_LIODN_2(port, idA, idB) \
26 	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
27 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
28 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
29 	  .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
30 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
31 	}
32 
33 #define SET_SRIO_LIODN_BASE(port, id_a) \
34 	{ .id = { id_a }, .num_ids = 1, .portid = port, \
35 	  .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
36 		+ (port - 1) * 0x200 \
37 		+ CONFIG_SYS_FSL_SRIO_ADDR, \
38 	}
39 
40 struct liodn_id_table {
41 	const char * compat;
42 	u32 id[2];
43 	u8 num_ids;
44 	phys_addr_t compat_offset;
45 	unsigned long reg_offset;
46 };
47 
48 struct fman_liodn_id_table {
49 	/* Freescale FMan Device Tree binding was updated for FMan.
50 	 * We need to support both new and old compatibles in order not to
51 	 * break backward compatibility.
52 	 */
53 	const char *compat[2];
54 	u32 id[2];
55 	u8 num_ids;
56 	phys_addr_t compat_offset;
57 	unsigned long reg_offset;
58 };
59 
60 extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
61 extern void set_liodns(void);
62 extern void fdt_fixup_liodn(void *blob);
63 
64 #define SET_LIODN_BASE_1(idA) \
65 	{ .id = { idA }, .num_ids = 1, }
66 
67 #define SET_LIODN_BASE_2(idA, idB) \
68 	{ .id = { idA, idB }, .num_ids = 2 }
69 
70 #define SET_FMAN_LIODN_ENTRY(name1, name2, idA, off, compatoff)\
71 	{ .compat[0] = name1, \
72 	  .compat[1] = name2, \
73 	  .id = { idA }, .num_ids = 1, \
74 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
75 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
76 	}
77 
78 #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
79 	{ .compat = name, \
80 	  .id = { idA }, .num_ids = 1, \
81 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
82 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
83 	}
84 
85 #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
86 	{ .compat = name, \
87 	  .id = { idA, idB }, .num_ids = 2, \
88 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
89 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
90 	}
91 
92 #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
93 	SET_LIODN_ENTRY_1(compat, liodn, \
94 		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
95 		compatoff)
96 
97 #define SET_USB_LIODN(usbNum, compat, liodn) \
98 	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
99 		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
100 
101 #define SET_SATA_LIODN(sataNum, liodn) \
102 	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
103 		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
104 
105 #define SET_PCI_LIODN(compat, pciNum, liodn) \
106 	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
107 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
108 
109 #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
110 	SET_LIODN_ENTRY_1(compat, liodn,\
111 		offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
112 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
113 
114 /* reg nodes for DMA start @ 0x300 */
115 #define SET_DMA_LIODN(dmaNum, compat, liodn) \
116 	SET_GUTS_LIODN(compat, liodn, dma##dmaNum##liodnr,\
117 		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
118 
119 #define SET_SDHC_LIODN(sdhcNum, liodn) \
120 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
121 		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
122 
123 #define SET_QE_LIODN(liodn) \
124 	SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
125 		CONFIG_SYS_MPC85xx_QE_OFFSET)
126 
127 #define SET_TDM_LIODN(liodn) \
128 	SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\
129 		CONFIG_SYS_MPC85xx_TDM_OFFSET)
130 
131 #define SET_QMAN_LIODN(liodn) \
132 	SET_LIODN_ENTRY_1("fsl,qman", liodn, \
133 		offsetof(struct ccsr_qman, liodnr) + \
134 		CONFIG_SYS_FSL_QMAN_OFFSET, \
135 		CONFIG_SYS_FSL_QMAN_OFFSET)
136 
137 #define SET_BMAN_LIODN(liodn) \
138 	SET_LIODN_ENTRY_1("fsl,bman", liodn, \
139 		offsetof(struct ccsr_bman, liodnr) + \
140 		CONFIG_SYS_FSL_BMAN_OFFSET, \
141 		CONFIG_SYS_FSL_BMAN_OFFSET)
142 
143 #define SET_PME_LIODN(liodn) \
144 	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
145 		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
146 		CONFIG_SYS_FSL_CORENET_PME_OFFSET)
147 
148 #define SET_PMAN_LIODN(num, liodn) \
149 	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
150 		offsetof(struct ccsr_pman, ppa1) + \
151 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
152 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
153 
154 /* -1 from portID due to how immap has the registers */
155 #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
156 	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
157 	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
158 
159 #ifdef CONFIG_SYS_FMAN_V3
160 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
161 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
162 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx", \
163 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
164 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
165 
166 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
167 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
168 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
169 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
170 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET)
171 
172 /* enetNum is 0, 1, 2... so we + 8 for type-2 10g to get to HW Port ID */
173 #define SET_FMAN_RX_10G_TYPE2_LIODN(fmNum, enetNum, liodn) \
174 	SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
175 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
176 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
177 #else
178 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
179 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
180 	SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-1g-rx", \
181 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
182 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
183 
184 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
185 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
186 	SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-10g-rx", \
187 		liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
188 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET)
189 #endif
190 /*
191  * handle both old and new versioned SEC properties:
192  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
193  */
194 #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
195 	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
196 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
197 		CONFIG_SYS_FSL_SEC_OFFSET, \
198 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
199 	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
200 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
201 		CONFIG_SYS_FSL_SEC_OFFSET, \
202 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
203 
204 /* This is a bit evil since we treat rtic param as both a string & hex value */
205 #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
206 	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
207 		liodnA,	\
208 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
209 		CONFIG_SYS_FSL_SEC_OFFSET, \
210 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
211 	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
212 		liodnA,	\
213 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
214 		CONFIG_SYS_FSL_SEC_OFFSET, \
215 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
216 
217 #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
218 	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
219 		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
220 		CONFIG_SYS_FSL_SEC_OFFSET, 0)
221 
222 #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
223 	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
224 	liodnA, \
225 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
226 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
227 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
228 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
229 
230 #define SET_RMAN_LIODN(ibNum, liodn) \
231 	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
232 		offsetof(struct ccsr_rman, mmitdr) + \
233 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
234 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
235 
236 extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
237 extern struct liodn_id_table raide_liodn_tbl[];
238 extern struct fman_liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
239 #ifdef CONFIG_SYS_SRIO
240 extern struct srio_liodn_id_table srio_liodn_tbl[];
241 extern int srio_liodn_tbl_sz;
242 #endif
243 extern struct liodn_id_table rman_liodn_tbl[];
244 extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
245 extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
246 extern int rman_liodn_tbl_sz;
247 
248 #endif
249