1 /*
2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _FSL_LIODN_H_
8 #define _FSL_LIODN_H_
9 
10 #include <asm/types.h>
11 
12 struct srio_liodn_id_table {
13 	u32 id[2];
14 	unsigned long reg_offset[2];
15 	u8 num_ids;
16 	u8 portid;
17 };
18 #define SET_SRIO_LIODN_1(port, idA) \
19 	{ .id = { idA }, .num_ids = 1, .portid = port, \
20 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
21 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
22 	}
23 
24 #define SET_SRIO_LIODN_2(port, idA, idB) \
25 	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
26 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
27 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
28 	  .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
29 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
30 	}
31 
32 #define SET_SRIO_LIODN_BASE(port, id_a) \
33 	{ .id = { id_a }, .num_ids = 1, .portid = port, \
34 	  .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
35 		+ (port - 1) * 0x200 \
36 		+ CONFIG_SYS_FSL_SRIO_ADDR, \
37 	}
38 
39 struct liodn_id_table {
40 	const char * compat;
41 	u32 id[2];
42 	u8 num_ids;
43 	phys_addr_t compat_offset;
44 	unsigned long reg_offset;
45 };
46 
47 extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
48 extern void set_liodns(void);
49 extern void fdt_fixup_liodn(void *blob);
50 
51 #define SET_LIODN_BASE_1(idA) \
52 	{ .id = { idA }, .num_ids = 1, }
53 
54 #define SET_LIODN_BASE_2(idA, idB) \
55 	{ .id = { idA, idB }, .num_ids = 2 }
56 
57 #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
58 	{ .compat = name, \
59 	  .id = { idA }, .num_ids = 1, \
60 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
61 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
62 	}
63 
64 #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
65 	{ .compat = name, \
66 	  .id = { idA, idB }, .num_ids = 2, \
67 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
68 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
69 	}
70 
71 #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
72 	SET_LIODN_ENTRY_1(compat, liodn, \
73 		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
74 		compatoff)
75 
76 #define SET_USB_LIODN(usbNum, compat, liodn) \
77 	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
78 		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
79 
80 #define SET_SATA_LIODN(sataNum, liodn) \
81 	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
82 		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
83 
84 #define SET_PCI_LIODN(compat, pciNum, liodn) \
85 	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
86 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
87 
88 #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
89 	SET_LIODN_ENTRY_1(compat, liodn,\
90 		offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
91 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
92 
93 /* reg nodes for DMA start @ 0x300 */
94 #define SET_DMA_LIODN(dmaNum, compat, liodn) \
95 	SET_GUTS_LIODN(compat, liodn, dma##dmaNum##liodnr,\
96 		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
97 
98 #define SET_SDHC_LIODN(sdhcNum, liodn) \
99 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
100 		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
101 
102 #define SET_QE_LIODN(liodn) \
103 	SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
104 		CONFIG_SYS_MPC85xx_QE_OFFSET)
105 
106 #define SET_TDM_LIODN(liodn) \
107 	SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\
108 		CONFIG_SYS_MPC85xx_TDM_OFFSET)
109 
110 #define SET_QMAN_LIODN(liodn) \
111 	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
112 		CONFIG_SYS_FSL_QMAN_OFFSET, \
113 		CONFIG_SYS_FSL_QMAN_OFFSET)
114 
115 #define SET_BMAN_LIODN(liodn) \
116 	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
117 		CONFIG_SYS_FSL_BMAN_OFFSET, \
118 		CONFIG_SYS_FSL_BMAN_OFFSET)
119 
120 #define SET_PME_LIODN(liodn) \
121 	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
122 		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
123 		CONFIG_SYS_FSL_CORENET_PME_OFFSET)
124 
125 #define SET_PMAN_LIODN(num, liodn) \
126 	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
127 		offsetof(struct ccsr_pman, ppa1) + \
128 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
129 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
130 
131 /* -1 from portID due to how immap has the registers */
132 #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
133 	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
134 	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
135 
136 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
137 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
138 	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
139 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
140 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
141 
142 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
143 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
144 	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
145 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
146 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
147 
148 /* enetNum is 0, 1, 2... so we + 8 for type-2 10g to get to HW Port ID */
149 #define SET_FMAN_RX_10G_TYPE2_LIODN(fmNum, enetNum, liodn) \
150 	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
151 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
152 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
153 
154 /*
155  * handle both old and new versioned SEC properties:
156  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
157  */
158 #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
159 	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
160 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
161 		CONFIG_SYS_FSL_SEC_OFFSET, \
162 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
163 	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
164 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
165 		CONFIG_SYS_FSL_SEC_OFFSET, \
166 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
167 
168 /* This is a bit evil since we treat rtic param as both a string & hex value */
169 #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
170 	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
171 		liodnA,	\
172 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
173 		CONFIG_SYS_FSL_SEC_OFFSET, \
174 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
175 	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
176 		liodnA,	\
177 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
178 		CONFIG_SYS_FSL_SEC_OFFSET, \
179 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
180 
181 #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
182 	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
183 		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
184 		CONFIG_SYS_FSL_SEC_OFFSET, 0)
185 
186 #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
187 	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
188 	liodnA, \
189 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
190 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
191 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
192 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
193 
194 #define SET_RMAN_LIODN(ibNum, liodn) \
195 	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
196 		offsetof(struct ccsr_rman, mmitdr) + \
197 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
198 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
199 
200 extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
201 extern struct liodn_id_table raide_liodn_tbl[];
202 extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
203 #ifdef CONFIG_SYS_SRIO
204 extern struct srio_liodn_id_table srio_liodn_tbl[];
205 extern int srio_liodn_tbl_sz;
206 #endif
207 extern struct liodn_id_table rman_liodn_tbl[];
208 extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
209 extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
210 extern int rman_liodn_tbl_sz;
211 
212 #endif
213