1 /* 2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 * 19 */ 20 21 #ifndef _ASM_CONFIG_H_ 22 #define _ASM_CONFIG_H_ 23 24 #ifdef CONFIG_MPC85xx 25 #include <asm/config_mpc85xx.h> 26 #endif 27 28 #ifdef CONFIG_MPC86xx 29 #include <asm/config_mpc86xx.h> 30 #endif 31 32 #ifndef HWCONFIG_BUFFER_SIZE 33 #define HWCONFIG_BUFFER_SIZE 256 34 #endif 35 36 /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */ 37 #if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI) 38 # ifndef CONFIG_HARD_SPI 39 # define CONFIG_HARD_SPI 40 # endif 41 #endif 42 43 #define CONFIG_LMB 44 #define CONFIG_SYS_BOOT_RAMDISK_HIGH 45 #define CONFIG_SYS_BOOT_GET_CMDLINE 46 #define CONFIG_SYS_BOOT_GET_KBD 47 48 #ifndef CONFIG_MAX_MEM_MAPPED 49 #if defined(CONFIG_4xx) || \ 50 defined(CONFIG_E500) || \ 51 defined(CONFIG_MPC86xx) || \ 52 defined(CONFIG_E300) 53 #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) 54 #else 55 #define CONFIG_MAX_MEM_MAPPED (256 << 20) 56 #endif 57 #endif 58 59 /* Check if boards need to enable FSL DMA engine for SDRAM init */ 60 #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC) 61 #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \ 62 ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \ 63 !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) 64 #define CONFIG_FSL_DMA 65 #endif 66 #endif 67 68 #ifndef CONFIG_MAX_CPUS 69 #define CONFIG_MAX_CPUS 1 70 #endif 71 72 /* 73 * Provide a default boot page translation virtual address that lines up with 74 * Freescale's default e500 reset page. 75 */ 76 #if (defined(CONFIG_E500) && defined(CONFIG_MP)) 77 #ifndef CONFIG_BPTR_VIRT_ADDR 78 #define CONFIG_BPTR_VIRT_ADDR 0xfffff000 79 #endif 80 #endif 81 82 /* 83 * SEC (crypto unit) major compatible version determination 84 */ 85 #if defined(CONFIG_MPC83xx) 86 #define CONFIG_SYS_FSL_SEC_COMPAT 2 87 #endif 88 89 /* Since so many PPC SOCs have a semi-common LBC, define this here */ 90 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \ 91 defined(CONFIG_MPC83xx) 92 #if !defined(CONFIG_FSL_IFC) 93 #define CONFIG_FSL_LBC 94 #endif 95 #endif 96 97 /* The TSEC driver uses the PHYLIB infrastructure */ 98 #ifndef CONFIG_PHYLIB 99 #if defined(CONFIG_TSEC_ENET) 100 #define CONFIG_PHYLIB 101 102 #include <config_phylib_all_drivers.h> 103 #endif /* TSEC_ENET */ 104 #endif /* !CONFIG_PHYLIB */ 105 106 /* The FMAN driver uses the PHYLIB infrastructure */ 107 #if defined(CONFIG_FMAN_ENET) 108 #define CONFIG_PHYLIB 109 #endif 110 111 /* All PPC boards must swap IDE bytes */ 112 #define CONFIG_IDE_SWAP_IO 113 114 #endif /* _ASM_CONFIG_H_ */ 115