1 /* 2 * Copyright 2010-2011 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * Version 2 as published by the Free Software Foundation. 7 */ 8 9 #include <common.h> 10 #include <asm/fsl_lbc.h> 11 12 #ifdef CONFIG_MPC85xx 13 /* Boards should provide their own version of this if they use lbc sdram */ 14 void __lbc_sdram_init(void) 15 { 16 /* Do nothing */ 17 } 18 void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init"))); 19 #endif 20 21 22 void print_lbc_regs(void) 23 { 24 int i; 25 26 printf("\nLocal Bus Controller Registers\n"); 27 for (i = 0; i < 8; i++) { 28 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n", 29 i, get_lbc_br(i), i, get_lbc_or(i)); 30 } 31 printf("LBCR\t0x%08X\tLCRR\t0x%08X\n", 32 get_lbc_lbcr(), get_lbc_lcrr()); 33 } 34 35 void init_early_memctl_regs(void) 36 { 37 uint init_br1 = 1; 38 39 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001 40 /* Set the local bus monitor timeout value to the maximum */ 41 clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf); 42 #endif 43 44 #ifdef CONFIG_MPC85xx 45 /* if cs1 is already set via debugger, leave cs0/cs1 alone */ 46 if (get_lbc_br(1) & BR_V) 47 init_br1 = 0; 48 #endif 49 50 /* 51 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at 52 * preliminary addresses - these have to be modified later 53 * when FLASH size has been determined 54 */ 55 #if defined(CONFIG_SYS_OR0_REMAP) 56 set_lbc_or(0, CONFIG_SYS_OR0_REMAP); 57 #endif 58 #if defined(CONFIG_SYS_OR1_REMAP) 59 set_lbc_or(1, CONFIG_SYS_OR1_REMAP); 60 #endif 61 /* now restrict to preliminary range */ 62 if (init_br1) { 63 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM) 64 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM); 65 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM); 66 #endif 67 68 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM) 69 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM); 70 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM); 71 #endif 72 } 73 74 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) 75 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); 76 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); 77 #endif 78 79 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) 80 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); 81 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); 82 #endif 83 84 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM) 85 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM); 86 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM); 87 #endif 88 89 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM) 90 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM); 91 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM); 92 #endif 93 94 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM) 95 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM); 96 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM); 97 #endif 98 99 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM) 100 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM); 101 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM); 102 #endif 103 } 104 105 /* 106 * Configures a UPM. The function requires the respective MxMR to be set 107 * before calling this function. "size" is the number or entries, not a sizeof. 108 */ 109 void upmconfig(uint upm, uint *table, uint size) 110 { 111 fsl_lbc_t *lbc = LBC_BASE_ADDR; 112 int i, mad, old_mad = 0; 113 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK); 114 u32 msel = BR_UPMx_TO_MSEL(upm); 115 u32 *mxmr = &lbc->mamr + upm; 116 volatile u8 *dummy = NULL; 117 118 if (upm < UPMA || upm > UPMC) { 119 printf("Error: %s() Bad UPM index %d\n", __func__, upm); 120 hang(); 121 } 122 123 /* 124 * Find the address for the dummy write - scan all of the BRs until we 125 * find one matching the UPM and extract the base address bits from it. 126 */ 127 for (i = 0; i < 8; i++) { 128 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) { 129 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA); 130 break; 131 } 132 } 133 134 if (!dummy) { 135 printf("Error: %s() No matching BR\n", __func__); 136 hang(); 137 } 138 139 /* Program UPM using steps outlined by the reference manual */ 140 for (i = 0; i < size; i++) { 141 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i); 142 out_be32(&lbc->mdr, table[i]); 143 (void)in_be32(&lbc->mdr); 144 *dummy = 0; 145 do { 146 mad = in_be32(mxmr) & MxMR_MAD_MSK; 147 } while (mad <= old_mad && !(!mad && i == (size-1))); 148 old_mad = mad; 149 } 150 151 /* Return to normal operation */ 152 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM); 153 } 154