1 /* 2 * Copyright 2010 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * Version 2 as published by the Free Software Foundation. 7 */ 8 9 #include <common.h> 10 #include <asm/fsl_lbc.h> 11 12 void print_lbc_regs(void) 13 { 14 int i; 15 16 printf("\nLocal Bus Controller Registers\n"); 17 for (i = 0; i < 8; i++) { 18 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n", 19 i, get_lbc_br(i), i, get_lbc_or(i)); 20 } 21 } 22 23 void init_early_memctl_regs(void) 24 { 25 uint init_br1 = 1; 26 27 #ifdef CONFIG_MPC85xx 28 /* if cs1 is already set via debugger, leave cs0/cs1 alone */ 29 if (get_lbc_br(1) & BR_V) 30 init_br1 = 0; 31 #endif 32 33 /* 34 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at 35 * preliminary addresses - these have to be modified later 36 * when FLASH size has been determined 37 */ 38 #if defined(CONFIG_SYS_OR0_REMAP) 39 set_lbc_or(0, CONFIG_SYS_OR0_REMAP); 40 #endif 41 #if defined(CONFIG_SYS_OR1_REMAP) 42 set_lbc_or(1, CONFIG_SYS_OR1_REMAP); 43 #endif 44 /* now restrict to preliminary range */ 45 if (init_br1) { 46 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM); 47 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM); 48 49 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM) 50 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM); 51 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM); 52 #endif 53 } 54 55 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) 56 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); 57 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); 58 #endif 59 60 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) 61 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); 62 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); 63 #endif 64 65 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM) 66 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM); 67 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM); 68 #endif 69 70 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM) 71 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM); 72 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM); 73 #endif 74 75 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM) 76 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM); 77 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM); 78 #endif 79 80 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM) 81 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM); 82 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM); 83 #endif 84 } 85 86 /* 87 * Configures a UPM. The function requires the respective MxMR to be set 88 * before calling this function. "size" is the number or entries, not a sizeof. 89 */ 90 void upmconfig(uint upm, uint *table, uint size) 91 { 92 fsl_lbc_t *lbc = LBC_BASE_ADDR; 93 int i, mdr, mad, old_mad = 0; 94 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK); 95 u32 msel = BR_UPMx_TO_MSEL(upm); 96 u32 *mxmr = &lbc->mamr + upm; 97 volatile u8 *dummy = NULL; 98 99 if (upm < UPMA || upm > UPMC) { 100 printf("Error: %s() Bad UPM index %d\n", __func__, upm); 101 hang(); 102 } 103 104 /* 105 * Find the address for the dummy write - scan all of the BRs until we 106 * find one matching the UPM and extract the base address bits from it. 107 */ 108 for (i = 0; i < 8; i++) { 109 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) { 110 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA); 111 break; 112 } 113 } 114 115 if (!dummy) { 116 printf("Error: %s() No matching BR\n", __func__); 117 hang(); 118 } 119 120 /* Program UPM using steps outlined by the reference manual */ 121 for (i = 0; i < size; i++) { 122 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i); 123 out_be32(&lbc->mdr, table[i]); 124 mdr = in_be32(&lbc->mdr); 125 *dummy = 0; 126 do { 127 mad = in_be32(mxmr) & MxMR_MAD_MSK; 128 } while (mad <= old_mad && !(!mad && i == (size-1))); 129 old_mad = mad; 130 } 131 132 /* Return to normal operation */ 133 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM); 134 } 135