xref: /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/fdt.c (revision a1c04e27)
1 /*
2  * Copyright 2009-2014 Freescale Semiconductor, Inc.
3  *
4  * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
5  * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
6  * cpu specific common code for 85xx/86xx processors.
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <libfdt.h>
12 #include <fdt_support.h>
13 #include <asm/mp.h>
14 #include <asm/fsl_serdes.h>
15 #include <phy.h>
16 #include <hwconfig.h>
17 
18 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
19 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
20 #endif
21 
22 #if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
23 static int ft_del_cpuhandle(void *blob, int cpuhandle)
24 {
25 	int off, ret = -FDT_ERR_NOTFOUND;
26 
27 	/* if we find a match, we'll delete at it which point the offsets are
28 	 * invalid so we start over from the beginning
29 	 */
30 	off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
31 						&cpuhandle, 4);
32 	while (off != -FDT_ERR_NOTFOUND) {
33 		fdt_delprop(blob, off, "cpu-handle");
34 		ret = 1;
35 		off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
36 				&cpuhandle, 4);
37 	}
38 
39 	return ret;
40 }
41 
42 void ft_fixup_num_cores(void *blob) {
43 	int off, num_cores, del_cores;
44 
45 	del_cores = 0;
46 	num_cores = cpu_numcores();
47 
48 	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
49 	while (off != -FDT_ERR_NOTFOUND) {
50 		u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
51 		u32 phys_cpu_id = thread_to_core(*reg);
52 
53 		if (!is_core_valid(phys_cpu_id) || is_core_disabled(phys_cpu_id)) {
54 			int ph = fdt_get_phandle(blob, off);
55 
56 			/* Delete the cpu node once there are no cpu handles */
57 			if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) {
58 				fdt_del_node(blob, off);
59 				del_cores++;
60 			}
61 			/* either we deleted some cpu handles or the cpu node
62 			 * so we reset the offset back to the start since we
63 			 * can't trust the offsets anymore
64 			 */
65 			off = -1;
66 		}
67 		off = fdt_node_offset_by_prop_value(blob, off,
68 				"device_type", "cpu", 4);
69 	}
70 	debug ("%x core system found\n", num_cores);
71 	debug ("deleted %d extra core entry entries from device tree\n",
72 								del_cores);
73 }
74 #endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
75 
76 /*
77  * update crypto node properties to a specified revision of the SEC
78  * called with sec_rev == 0 if not on an E processor
79  */
80 #if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
81 void fdt_fixup_crypto_node(void *blob, int sec_rev)
82 {
83 	static const struct sec_rev_prop {
84 		u32 sec_rev;
85 		u32 num_channels;
86 		u32 channel_fifo_len;
87 		u32 exec_units_mask;
88 		u32 descriptor_types_mask;
89 	} sec_rev_prop_list [] = {
90 		{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
91 		{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
92 		{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
93 		{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
94 		{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
95 		{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
96 		{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
97 	};
98 	static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
99 				   sizeof("fsl,secX.Y")];
100 	int crypto_node, sec_idx, err;
101 	char *p;
102 	u32 val;
103 
104 	/* locate crypto node based on lowest common compatible */
105 	crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
106 	if (crypto_node == -FDT_ERR_NOTFOUND)
107 		return;
108 
109 	/* delete it if not on an E-processor */
110 	if (crypto_node > 0 && !sec_rev) {
111 		fdt_del_node(blob, crypto_node);
112 		return;
113 	}
114 
115 	/* else we got called for possible uprev */
116 	for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
117 		if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
118 			break;
119 
120 	if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
121 		puts("warning: unknown SEC revision number\n");
122 		return;
123 	}
124 
125 	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
126 	err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
127 	if (err < 0)
128 		printf("WARNING: could not set crypto property: %s\n",
129 		       fdt_strerror(err));
130 
131 	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
132 	err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
133 	if (err < 0)
134 		printf("WARNING: could not set crypto property: %s\n",
135 		       fdt_strerror(err));
136 
137 	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
138 	err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
139 	if (err < 0)
140 		printf("WARNING: could not set crypto property: %s\n",
141 		       fdt_strerror(err));
142 
143 	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
144 	err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
145 	if (err < 0)
146 		printf("WARNING: could not set crypto property: %s\n",
147 		       fdt_strerror(err));
148 
149 	val = 0;
150 	while (sec_idx >= 0) {
151 		p = compat_strlist + val;
152 		val += sprintf(p, "fsl,sec%d.%d",
153 			(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
154 			sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
155 		sec_idx--;
156 	}
157 	err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
158 	if (err < 0)
159 		printf("WARNING: could not set crypto property: %s\n",
160 		       fdt_strerror(err));
161 }
162 #elif CONFIG_SYS_FSL_SEC_COMPAT >= 4  /* SEC4 */
163 static u8 caam_get_era(void)
164 {
165 	static const struct {
166 		u16 ip_id;
167 		u8 maj_rev;
168 		u8 era;
169 	} caam_eras[] = {
170 		{0x0A10, 1, 1},
171 		{0x0A10, 2, 2},
172 		{0x0A12, 1, 3},
173 		{0x0A14, 1, 3},
174 		{0x0A14, 2, 4},
175 		{0x0A16, 1, 4},
176 		{0x0A10, 3, 4},
177 		{0x0A11, 1, 4},
178 		{0x0A18, 1, 4},
179 		{0x0A11, 2, 5},
180 		{0x0A12, 2, 5},
181 		{0x0A13, 1, 5},
182 		{0x0A1C, 1, 5}
183 	};
184 
185 	ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
186 	u32 secvid_ms = sec_in32(&sec->secvid_ms);
187 	u32 ccbvid = sec_in32(&sec->ccbvid);
188 	u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
189 				SEC_SECVID_MS_IPID_SHIFT;
190 	u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
191 				SEC_SECVID_MS_MAJ_REV_SHIFT;
192 	u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
193 
194 	int i;
195 
196 	if (era)	/* This is '0' prior to CAAM ERA-6 */
197 		return era;
198 
199 	for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
200 		if (caam_eras[i].ip_id == ip_id &&
201 		    caam_eras[i].maj_rev == maj_rev)
202 			return caam_eras[i].era;
203 
204 	return 0;
205 }
206 
207 static void fdt_fixup_crypto_era(void *blob, u32 era)
208 {
209 	int err;
210 	int crypto_node;
211 
212 	crypto_node = fdt_path_offset(blob, "crypto");
213 	if (crypto_node < 0) {
214 		printf("WARNING: Missing crypto node\n");
215 		return;
216 	}
217 
218 	err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
219 			  sizeof(era));
220 	if (err < 0) {
221 		printf("ERROR: could not set fsl,sec-era property: %s\n",
222 		       fdt_strerror(err));
223 	}
224 }
225 
226 void fdt_fixup_crypto_node(void *blob, int sec_rev)
227 {
228 	u8 era;
229 
230 	if (!sec_rev) {
231 		fdt_del_node_and_alias(blob, "crypto");
232 		return;
233 	}
234 
235 	/* Add SEC ERA information in compatible */
236 	era = caam_get_era();
237 	if (era) {
238 		fdt_fixup_crypto_era(blob, era);
239 	} else {
240 		printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
241 			sec_rev);
242 	}
243 }
244 #endif
245 
246 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
247 {
248 	return fdt_setprop_string(blob, offset, "phy-connection-type",
249 					 phy_string_for_interface(phyc));
250 }
251 
252 #ifdef CONFIG_SYS_SRIO
253 static inline void ft_disable_srio_port(void *blob, int srio_off, int port)
254 {
255 	int off = fdt_node_offset_by_prop_value(blob, srio_off,
256 			"cell-index", &port, 4);
257 	if (off >= 0) {
258 		off = fdt_setprop_string(blob, off, "status", "disabled");
259 		if (off > 0)
260 			printf("WARNING unable to set status for fsl,srio "
261 				"port %d: %s\n", port, fdt_strerror(off));
262 	}
263 }
264 
265 static inline void ft_disable_rman(void *blob)
266 {
267 	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman");
268 	if (off >= 0) {
269 		off = fdt_setprop_string(blob, off, "status", "disabled");
270 		if (off > 0)
271 			printf("WARNING unable to set status for fsl,rman %s\n",
272 				fdt_strerror(off));
273 	}
274 }
275 
276 static inline void ft_disable_rmu(void *blob)
277 {
278 	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
279 	if (off >= 0) {
280 		off = fdt_setprop_string(blob, off, "status", "disabled");
281 		if (off > 0)
282 			printf("WARNING unable to set status for "
283 				"fsl,srio-rmu %s\n", fdt_strerror(off));
284 	}
285 }
286 
287 void ft_srio_setup(void *blob)
288 {
289 	int srio1_used = 0, srio2_used = 0;
290 	int srio_off;
291 
292 	/* search for srio node, if doesn't exist just return - nothing todo */
293 	srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
294 	if (srio_off < 0)
295 		return ;
296 
297 #ifdef CONFIG_SRIO1
298 	if (is_serdes_configured(SRIO1))
299 		srio1_used = 1;
300 #endif
301 #ifdef CONFIG_SRIO2
302 	if (is_serdes_configured(SRIO2))
303 		srio2_used = 1;
304 #endif
305 
306 	/* mark port1 disabled */
307 	if (!srio1_used)
308 		ft_disable_srio_port(blob, srio_off, 1);
309 
310 	/* mark port2 disabled */
311 	if (!srio2_used)
312 		ft_disable_srio_port(blob, srio_off, 2);
313 
314 	/* if both ports not used, disable controller, rmu and rman */
315 	if (!srio1_used && !srio2_used) {
316 		fdt_setprop_string(blob, srio_off, "status", "disabled");
317 
318 		ft_disable_rman(blob);
319 		ft_disable_rmu(blob);
320 	}
321 }
322 #endif
323