1 /* 2 * Copyright 2009-2012 Freescale Semiconductor, Inc. 3 * 4 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and 5 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains 6 * cpu specific common code for 85xx/86xx processors. 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #include <config.h> 27 #include <common.h> 28 #include <command.h> 29 #include <tsec.h> 30 #include <fm_eth.h> 31 #include <netdev.h> 32 #include <asm/cache.h> 33 #include <asm/io.h> 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 struct cpu_type cpu_type_list [] = { 38 #if defined(CONFIG_MPC85xx) 39 CPU_TYPE_ENTRY(8533, 8533, 1), 40 CPU_TYPE_ENTRY(8535, 8535, 1), 41 CPU_TYPE_ENTRY(8536, 8536, 1), 42 CPU_TYPE_ENTRY(8540, 8540, 1), 43 CPU_TYPE_ENTRY(8541, 8541, 1), 44 CPU_TYPE_ENTRY(8543, 8543, 1), 45 CPU_TYPE_ENTRY(8544, 8544, 1), 46 CPU_TYPE_ENTRY(8545, 8545, 1), 47 CPU_TYPE_ENTRY(8547, 8547, 1), 48 CPU_TYPE_ENTRY(8548, 8548, 1), 49 CPU_TYPE_ENTRY(8555, 8555, 1), 50 CPU_TYPE_ENTRY(8560, 8560, 1), 51 CPU_TYPE_ENTRY(8567, 8567, 1), 52 CPU_TYPE_ENTRY(8568, 8568, 1), 53 CPU_TYPE_ENTRY(8569, 8569, 1), 54 CPU_TYPE_ENTRY(8572, 8572, 2), 55 CPU_TYPE_ENTRY(P1010, P1010, 1), 56 CPU_TYPE_ENTRY(P1011, P1011, 1), 57 CPU_TYPE_ENTRY(P1012, P1012, 1), 58 CPU_TYPE_ENTRY(P1013, P1013, 1), 59 CPU_TYPE_ENTRY(P1014, P1014, 1), 60 CPU_TYPE_ENTRY(P1015, P1015, 1), 61 CPU_TYPE_ENTRY(P1016, P1016, 1), 62 CPU_TYPE_ENTRY(P1017, P1017, 1), 63 CPU_TYPE_ENTRY(P1020, P1020, 2), 64 CPU_TYPE_ENTRY(P1021, P1021, 2), 65 CPU_TYPE_ENTRY(P1022, P1022, 2), 66 CPU_TYPE_ENTRY(P1023, P1023, 2), 67 CPU_TYPE_ENTRY(P1024, P1024, 2), 68 CPU_TYPE_ENTRY(P1025, P1025, 2), 69 CPU_TYPE_ENTRY(P2010, P2010, 1), 70 CPU_TYPE_ENTRY(P2020, P2020, 2), 71 CPU_TYPE_ENTRY(P2040, P2040, 4), 72 CPU_TYPE_ENTRY(P2041, P2041, 4), 73 CPU_TYPE_ENTRY(P3041, P3041, 4), 74 CPU_TYPE_ENTRY_MASK(P3060, P3060, 6, 0xf3), 75 CPU_TYPE_ENTRY(P4040, P4040, 4), 76 CPU_TYPE_ENTRY(P4080, P4080, 8), 77 CPU_TYPE_ENTRY(P5010, P5010, 1), 78 CPU_TYPE_ENTRY(P5020, P5020, 2), 79 CPU_TYPE_ENTRY(BSC9130, 9130, 1), 80 CPU_TYPE_ENTRY(BSC9131, 9131, 1), 81 #elif defined(CONFIG_MPC86xx) 82 CPU_TYPE_ENTRY(8610, 8610, 1), 83 CPU_TYPE_ENTRY(8641, 8641, 2), 84 CPU_TYPE_ENTRY(8641D, 8641D, 2), 85 #endif 86 }; 87 88 struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1); 89 90 struct cpu_type *identify_cpu(u32 ver) 91 { 92 int i; 93 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) { 94 if (cpu_type_list[i].soc_ver == ver) 95 return &cpu_type_list[i]; 96 } 97 return &cpu_type_unknown; 98 } 99 100 #define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00 101 #define MPC8xxx_PICFRR_NCPU_SHIFT 8 102 103 /* 104 * Return a 32-bit mask indicating which cores are present on this SOC. 105 */ 106 u32 cpu_mask() 107 { 108 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; 109 struct cpu_type *cpu = gd->cpu; 110 111 /* better to query feature reporting register than just assume 1 */ 112 if (cpu == &cpu_type_unknown) 113 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >> 114 MPC8xxx_PICFRR_NCPU_SHIFT) + 1; 115 116 return cpu->mask; 117 } 118 119 /* 120 * Return the number of cores on this SOC. 121 */ 122 int cpu_numcores() { 123 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; 124 struct cpu_type *cpu = gd->cpu; 125 126 /* better to query feature reporting register than just assume 1 */ 127 if (cpu == &cpu_type_unknown) 128 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >> 129 MPC8xxx_PICFRR_NCPU_SHIFT) + 1; 130 131 return cpu->num_cores; 132 } 133 134 /* 135 * Check if the given core ID is valid 136 * 137 * Returns zero if it isn't, 1 if it is. 138 */ 139 int is_core_valid(unsigned int core) 140 { 141 struct cpu_type *cpu = gd->cpu; 142 143 return !!((1 << core) & cpu->mask); 144 } 145 146 int probecpu (void) 147 { 148 uint svr; 149 uint ver; 150 151 svr = get_svr(); 152 ver = SVR_SOC_VER(svr); 153 154 gd->cpu = identify_cpu(ver); 155 156 return 0; 157 } 158 159 /* 160 * Initializes on-chip ethernet controllers. 161 * to override, implement board_eth_init() 162 */ 163 int cpu_eth_init(bd_t *bis) 164 { 165 #if defined(CONFIG_ETHER_ON_FCC) 166 fec_initialize(bis); 167 #endif 168 169 #if defined(CONFIG_UEC_ETH) 170 uec_standard_init(bis); 171 #endif 172 173 #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) 174 tsec_standard_init(bis); 175 #endif 176 177 #ifdef CONFIG_FMAN_ENET 178 fm_standard_init(bis); 179 #endif 180 return 0; 181 } 182