1 /* 2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 3 * 4 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and 5 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains 6 * cpu specific common code for 85xx/86xx processors. 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #include <config.h> 27 #include <common.h> 28 #include <command.h> 29 #include <tsec.h> 30 #include <fm_eth.h> 31 #include <netdev.h> 32 #include <asm/cache.h> 33 #include <asm/io.h> 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 struct cpu_type cpu_type_list [] = { 38 #if defined(CONFIG_MPC85xx) 39 CPU_TYPE_ENTRY(8533, 8533, 1), 40 CPU_TYPE_ENTRY(8533, 8533_E, 1), 41 CPU_TYPE_ENTRY(8535, 8535, 1), 42 CPU_TYPE_ENTRY(8535, 8535_E, 1), 43 CPU_TYPE_ENTRY(8536, 8536, 1), 44 CPU_TYPE_ENTRY(8536, 8536_E, 1), 45 CPU_TYPE_ENTRY(8540, 8540, 1), 46 CPU_TYPE_ENTRY(8541, 8541, 1), 47 CPU_TYPE_ENTRY(8541, 8541_E, 1), 48 CPU_TYPE_ENTRY(8543, 8543, 1), 49 CPU_TYPE_ENTRY(8543, 8543_E, 1), 50 CPU_TYPE_ENTRY(8544, 8544, 1), 51 CPU_TYPE_ENTRY(8544, 8544_E, 1), 52 CPU_TYPE_ENTRY(8545, 8545, 1), 53 CPU_TYPE_ENTRY(8545, 8545_E, 1), 54 CPU_TYPE_ENTRY(8547, 8547_E, 1), 55 CPU_TYPE_ENTRY(8548, 8548, 1), 56 CPU_TYPE_ENTRY(8548, 8548_E, 1), 57 CPU_TYPE_ENTRY(8555, 8555, 1), 58 CPU_TYPE_ENTRY(8555, 8555_E, 1), 59 CPU_TYPE_ENTRY(8560, 8560, 1), 60 CPU_TYPE_ENTRY(8567, 8567, 1), 61 CPU_TYPE_ENTRY(8567, 8567_E, 1), 62 CPU_TYPE_ENTRY(8568, 8568, 1), 63 CPU_TYPE_ENTRY(8568, 8568_E, 1), 64 CPU_TYPE_ENTRY(8569, 8569, 1), 65 CPU_TYPE_ENTRY(8569, 8569_E, 1), 66 CPU_TYPE_ENTRY(8572, 8572, 2), 67 CPU_TYPE_ENTRY(8572, 8572_E, 2), 68 CPU_TYPE_ENTRY(P1010, P1010, 1), 69 CPU_TYPE_ENTRY(P1010, P1010_E, 1), 70 CPU_TYPE_ENTRY(P1011, P1011, 1), 71 CPU_TYPE_ENTRY(P1011, P1011_E, 1), 72 CPU_TYPE_ENTRY(P1012, P1012, 1), 73 CPU_TYPE_ENTRY(P1012, P1012_E, 1), 74 CPU_TYPE_ENTRY(P1013, P1013, 1), 75 CPU_TYPE_ENTRY(P1013, P1013_E, 1), 76 CPU_TYPE_ENTRY(P1014, P1014_E, 1), 77 CPU_TYPE_ENTRY(P1014, P1014, 1), 78 CPU_TYPE_ENTRY(P1015, P1015_E, 1), 79 CPU_TYPE_ENTRY(P1015, P1015, 1), 80 CPU_TYPE_ENTRY(P1016, P1016_E, 1), 81 CPU_TYPE_ENTRY(P1016, P1016, 1), 82 CPU_TYPE_ENTRY(P1017, P1017, 1), 83 CPU_TYPE_ENTRY(P1017, P1017_E, 1), 84 CPU_TYPE_ENTRY(P1020, P1020, 2), 85 CPU_TYPE_ENTRY(P1020, P1020_E, 2), 86 CPU_TYPE_ENTRY(P1021, P1021, 2), 87 CPU_TYPE_ENTRY(P1021, P1021_E, 2), 88 CPU_TYPE_ENTRY(P1022, P1022, 2), 89 CPU_TYPE_ENTRY(P1022, P1022_E, 2), 90 CPU_TYPE_ENTRY(P1023, P1023, 2), 91 CPU_TYPE_ENTRY(P1023, P1023_E, 2), 92 CPU_TYPE_ENTRY(P1024, P1024, 2), 93 CPU_TYPE_ENTRY(P1024, P1024_E, 2), 94 CPU_TYPE_ENTRY(P1025, P1025, 2), 95 CPU_TYPE_ENTRY(P1025, P1025_E, 2), 96 CPU_TYPE_ENTRY(P2010, P2010, 1), 97 CPU_TYPE_ENTRY(P2010, P2010_E, 1), 98 CPU_TYPE_ENTRY(P2020, P2020, 2), 99 CPU_TYPE_ENTRY(P2020, P2020_E, 2), 100 CPU_TYPE_ENTRY(P2040, P2040, 4), 101 CPU_TYPE_ENTRY(P2040, P2040_E, 4), 102 CPU_TYPE_ENTRY(P2041, P2041, 4), 103 CPU_TYPE_ENTRY(P2041, P2041_E, 4), 104 CPU_TYPE_ENTRY(P3041, P3041, 4), 105 CPU_TYPE_ENTRY(P3041, P3041_E, 4), 106 CPU_TYPE_ENTRY_MASK(P3060, P3060, 6, 0xf3), 107 CPU_TYPE_ENTRY_MASK(P3060, P3060_E, 6, 0xf3), 108 CPU_TYPE_ENTRY(P4040, P4040, 4), 109 CPU_TYPE_ENTRY(P4040, P4040_E, 4), 110 CPU_TYPE_ENTRY(P4080, P4080, 8), 111 CPU_TYPE_ENTRY(P4080, P4080_E, 8), 112 CPU_TYPE_ENTRY(P5010, P5010, 1), 113 CPU_TYPE_ENTRY(P5010, P5010_E, 1), 114 CPU_TYPE_ENTRY(P5020, P5020, 2), 115 CPU_TYPE_ENTRY(P5020, P5020_E, 2), 116 #elif defined(CONFIG_MPC86xx) 117 CPU_TYPE_ENTRY(8610, 8610, 1), 118 CPU_TYPE_ENTRY(8641, 8641, 2), 119 CPU_TYPE_ENTRY(8641D, 8641D, 2), 120 #endif 121 }; 122 123 struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1); 124 125 struct cpu_type *identify_cpu(u32 ver) 126 { 127 int i; 128 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) { 129 if (cpu_type_list[i].soc_ver == ver) 130 return &cpu_type_list[i]; 131 } 132 return &cpu_type_unknown; 133 } 134 135 #define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00 136 #define MPC8xxx_PICFRR_NCPU_SHIFT 8 137 138 /* 139 * Return a 32-bit mask indicating which cores are present on this SOC. 140 */ 141 u32 cpu_mask() 142 { 143 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; 144 struct cpu_type *cpu = gd->cpu; 145 146 /* better to query feature reporting register than just assume 1 */ 147 if (cpu == &cpu_type_unknown) 148 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >> 149 MPC8xxx_PICFRR_NCPU_SHIFT) + 1; 150 151 return cpu->mask; 152 } 153 154 /* 155 * Return the number of cores on this SOC. 156 */ 157 int cpu_numcores() { 158 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; 159 struct cpu_type *cpu = gd->cpu; 160 161 /* better to query feature reporting register than just assume 1 */ 162 if (cpu == &cpu_type_unknown) 163 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >> 164 MPC8xxx_PICFRR_NCPU_SHIFT) + 1; 165 166 return cpu->num_cores; 167 } 168 169 /* 170 * Check if the given core ID is valid 171 * 172 * Returns zero if it isn't, 1 if it is. 173 */ 174 int is_core_valid(unsigned int core) 175 { 176 struct cpu_type *cpu = gd->cpu; 177 178 return !!((1 << core) & cpu->mask); 179 } 180 181 int probecpu (void) 182 { 183 uint svr; 184 uint ver; 185 186 svr = get_svr(); 187 ver = SVR_SOC_VER(svr); 188 189 gd->cpu = identify_cpu(ver); 190 191 return 0; 192 } 193 194 /* 195 * Initializes on-chip ethernet controllers. 196 * to override, implement board_eth_init() 197 */ 198 int cpu_eth_init(bd_t *bis) 199 { 200 #if defined(CONFIG_ETHER_ON_FCC) 201 fec_initialize(bis); 202 #endif 203 204 #if defined(CONFIG_UEC_ETH) 205 uec_standard_init(bis); 206 #endif 207 208 #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) 209 tsec_standard_init(bis); 210 #endif 211 212 #ifdef CONFIG_FMAN_ENET 213 fm_standard_init(bis); 214 #endif 215 return 0; 216 } 217