1menu "mpc8xx CPU" 2 depends on MPC8xx 3 4config SYS_CPU 5 default "mpc8xx" 6 7choice 8 prompt "Target select" 9 optional 10 11config TARGET_MCR3000 12 bool "Support MCR3000 board from CSSI" 13 14endchoice 15 16choice 17 prompt "CPU select" 18 default MPC866 19 20config MPC866 21 bool "MPC866" 22 23config MPC885 24 bool "MPC885" 25 26endchoice 27 28config MPC8xx_WATCHDOG 29 bool "Watchdog" 30 select HW_WATCHDOG 31 32config 8xx_GCLK_FREQ 33 int "CPU GCLK Frequency" 34 35comment "Specific commands" 36 37config CMD_IMMAP 38 bool "Enable various commands to dump IMMR information" 39 help 40 This enables various commands such as: 41 42 siuinfo - print System Interface Unit (SIU) registers 43 memcinfo - print Memory Controller registers 44 45comment "Configuration Registers" 46 47config SYS_SIUMCR 48 hex "SIUMCR register" 49 help 50 SIU Module Configuration (11-6) 51 52config SYS_SYPCR 53 hex "SYPCR register" 54 help 55 System Protection Control (11-9) 56 57config SYS_TBSCR 58 hex "TBSCR register" 59 help 60 Time Base Status and Control (11-26) 61 62config SYS_PISCR 63 hex "PISCR register" 64 help 65 Periodic Interrupt Status and Control (11-31) 66 67config SYS_PLPRCR_BOOL 68 bool "Customise PLPRCR" 69 70config SYS_PLPRCR 71 hex "PLPRCR register" 72 depends on SYS_PLPRCR_BOOL 73 help 74 PLL, Low-Power, and Reset Control Register (15-30) 75 76config SYS_SCCR 77 hex "SCCR register" 78 help 79 System Clock and reset Control Register (15-27) 80 81config SYS_SCCR_MASK 82 hex "MASK for setting SCCR register" 83 84config SYS_DER 85 hex "DER register" 86 help 87 Debug Event Register (37-47) 88 89comment "Memory mapping" 90 91config SYS_BR0_PRELIM 92 hex "Preliminary value for BR0" 93 94config SYS_OR0_PRELIM 95 hex "Preliminary value for OR0" 96 97config SYS_BR1_PRELIM_BOOL 98 bool "Define Bank 1" 99 100config SYS_BR1_PRELIM 101 hex "Preliminary value for BR1" 102 depends on SYS_BR1_PRELIM_BOOL 103 104config SYS_OR1_PRELIM 105 hex "Preliminary value for OR1" 106 depends on SYS_BR1_PRELIM_BOOL 107 108config SYS_BR2_PRELIM_BOOL 109 bool "Define Bank 2" 110 111config SYS_BR2_PRELIM 112 hex "Preliminary value for BR2" 113 depends on SYS_BR2_PRELIM_BOOL 114 115config SYS_OR2_PRELIM 116 hex "Preliminary value for OR2" 117 depends on SYS_BR2_PRELIM_BOOL 118 119config SYS_BR3_PRELIM_BOOL 120 bool "Define Bank 3" 121 122config SYS_BR3_PRELIM 123 hex "Preliminary value for BR3" 124 depends on SYS_BR3_PRELIM_BOOL 125 126config SYS_OR3_PRELIM 127 hex "Preliminary value for OR3" 128 depends on SYS_BR3_PRELIM_BOOL 129 130config SYS_BR4_PRELIM_BOOL 131 bool "Define Bank 4" 132 133config SYS_BR4_PRELIM 134 hex "Preliminary value for BR4" 135 depends on SYS_BR4_PRELIM_BOOL 136 137config SYS_OR4_PRELIM 138 hex "Preliminary value for OR4" 139 depends on SYS_BR4_PRELIM_BOOL 140 141config SYS_BR5_PRELIM_BOOL 142 bool "Define Bank 5" 143 144config SYS_BR5_PRELIM 145 hex "Preliminary value for BR5" 146 depends on SYS_BR5_PRELIM_BOOL 147 148config SYS_OR5_PRELIM 149 hex "Preliminary value for OR5" 150 depends on SYS_BR5_PRELIM_BOOL 151 152config SYS_BR6_PRELIM_BOOL 153 bool "Define Bank 6" 154 155config SYS_BR6_PRELIM 156 hex "Preliminary value for BR6" 157 depends on SYS_BR6_PRELIM_BOOL 158 159config SYS_OR6_PRELIM 160 hex "Preliminary value for OR6" 161 depends on SYS_BR6_PRELIM_BOOL 162 163config SYS_BR7_PRELIM_BOOL 164 bool "Define Bank 7" 165 166config SYS_BR7_PRELIM 167 hex "Preliminary value for BR7" 168 depends on SYS_BR7_PRELIM_BOOL 169 170config SYS_OR7_PRELIM 171 hex "Preliminary value for OR7" 172 depends on SYS_BR7_PRELIM_BOOL 173 174config SYS_IMMR 175 hex "Value for IMMR" 176 177source "board/cssi/MCR3000/Kconfig" 178 179endmenu 180