xref: /openbmc/u-boot/arch/powerpc/cpu/mpc8xx/Kconfig (revision a3b36c84)
1menu "mpc8xx CPU"
2	depends on 8xx
3
4config SYS_CPU
5	default "mpc8xx"
6
7choice
8	prompt "Target select"
9	optional
10
11config TARGET_MCR3000
12	bool "Support MCR3000 board from CSSI"
13
14endchoice
15
16choice
17	prompt "CPU select"
18	default MPC866
19
20config MPC866
21	bool "MPC866"
22
23config MPC885
24	bool "MPC885"
25
26endchoice
27
28config 8xx_GCLK_FREQ
29	int "CPU GCLK Frequency"
30
31comment "Specific commands"
32
33config CMD_IMMAP
34	bool "Enable various commands to dump IMMR information"
35	help
36	  This enables various commands such as:
37
38	    siuinfo - print System Interface Unit (SIU) registers
39	    memcinfo - print Memory Controller registers
40
41comment "Configuration Registers"
42
43config SYS_SIUMCR
44	hex "SIUMCR register"
45	help
46	  SIU Module Configuration (11-6)
47
48config SYS_SYPCR
49	hex "SYPCR register"
50	help
51	  System Protection Control (11-9)
52
53config SYS_TBSCR
54	hex "TBSCR register"
55	help
56	  Time Base Status and Control (11-26)
57
58config SYS_PISCR
59	hex "PISCR register"
60	help
61	  Periodic Interrupt Status and Control (11-31)
62
63config SYS_PLPRCR_BOOL
64	bool "Customise PLPRCR"
65
66config SYS_PLPRCR
67	hex "PLPRCR register"
68	depends on SYS_PLPRCR_BOOL
69	help
70	  PLL, Low-Power, and Reset Control Register (15-30)
71
72config SYS_SCCR
73	hex "SCCR register"
74	help
75	  System Clock and reset Control Register (15-27)
76
77config SYS_SCCR_MASK
78	hex "MASK for setting SCCR register"
79
80config SYS_DER
81	hex "DER register"
82	help
83	  Debug Event Register (37-47)
84
85comment "Memory mapping"
86
87config SYS_BR0_PRELIM
88	hex "Preliminary value for BR0"
89
90config SYS_OR0_PRELIM
91	hex "Preliminary value for OR0"
92
93config SYS_BR1_PRELIM_BOOL
94	bool "Define Bank 1"
95
96config SYS_BR1_PRELIM
97	hex "Preliminary value for BR1"
98	depends on SYS_BR1_PRELIM_BOOL
99
100config SYS_OR1_PRELIM
101	hex "Preliminary value for OR1"
102	depends on SYS_BR1_PRELIM_BOOL
103
104config SYS_BR2_PRELIM_BOOL
105	bool "Define Bank 2"
106
107config SYS_BR2_PRELIM
108	hex "Preliminary value for BR2"
109	depends on SYS_BR2_PRELIM_BOOL
110
111config SYS_OR2_PRELIM
112	hex "Preliminary value for OR2"
113	depends on SYS_BR2_PRELIM_BOOL
114
115config SYS_BR3_PRELIM_BOOL
116	bool "Define Bank 3"
117
118config SYS_BR3_PRELIM
119	hex "Preliminary value for BR3"
120	depends on SYS_BR3_PRELIM_BOOL
121
122config SYS_OR3_PRELIM
123	hex "Preliminary value for OR3"
124	depends on SYS_BR3_PRELIM_BOOL
125
126config SYS_BR4_PRELIM_BOOL
127	bool "Define Bank 4"
128
129config SYS_BR4_PRELIM
130	hex "Preliminary value for BR4"
131	depends on SYS_BR4_PRELIM_BOOL
132
133config SYS_OR4_PRELIM
134	hex "Preliminary value for OR4"
135	depends on SYS_BR4_PRELIM_BOOL
136
137config SYS_BR5_PRELIM_BOOL
138	bool "Define Bank 5"
139
140config SYS_BR5_PRELIM
141	hex "Preliminary value for BR5"
142	depends on SYS_BR5_PRELIM_BOOL
143
144config SYS_OR5_PRELIM
145	hex "Preliminary value for OR5"
146	depends on SYS_BR5_PRELIM_BOOL
147
148config SYS_BR6_PRELIM_BOOL
149	bool "Define Bank 6"
150
151config SYS_BR6_PRELIM
152	hex "Preliminary value for BR6"
153	depends on SYS_BR6_PRELIM_BOOL
154
155config SYS_OR6_PRELIM
156	hex "Preliminary value for OR6"
157	depends on SYS_BR6_PRELIM_BOOL
158
159config SYS_BR7_PRELIM_BOOL
160	bool "Define Bank 7"
161
162config SYS_BR7_PRELIM
163	hex "Preliminary value for BR7"
164	depends on SYS_BR7_PRELIM_BOOL
165
166config SYS_OR7_PRELIM
167	hex "Preliminary value for OR7"
168	depends on SYS_BR7_PRELIM_BOOL
169
170config SYS_IMMR
171	hex "Value for IMMR"
172
173source "board/cssi/MCR3000/Kconfig"
174
175endmenu
176