xref: /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/speed.c (revision 03efcb05)
1 /*
2  * Copyright 2004 Freescale Semiconductor.
3  * Jeff Brown
4  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
5  *
6  * (C) Copyright 2000-2002
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <mpc86xx.h>
14 #include <asm/processor.h>
15 #include <asm/io.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 /* used in some defintiions of CONFIG_SYS_CLK_FREQ */
20 extern unsigned long get_board_sys_clk(unsigned long dummy);
21 
22 void get_sys_info(sys_info_t *sysInfo)
23 {
24 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
25 	volatile ccsr_gur_t *gur = &immap->im_gur;
26 	uint plat_ratio, e600_ratio;
27 	uint lcrr_div;
28 
29 	plat_ratio = (gur->porpllsr) & 0x0000003e;
30 	plat_ratio >>= 1;
31 
32 	switch (plat_ratio) {
33 	case 0x0:
34 		sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
35 		break;
36 	case 0x02:
37 	case 0x03:
38 	case 0x04:
39 	case 0x05:
40 	case 0x06:
41 	case 0x08:
42 	case 0x09:
43 	case 0x0a:
44 	case 0x0c:
45 	case 0x10:
46 		sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
47 		break;
48 	default:
49 		sysInfo->freqSystemBus = 0;
50 		break;
51 	}
52 
53 	e600_ratio = (gur->porpllsr) & 0x003f0000;
54 	e600_ratio >>= 16;
55 
56 	switch (e600_ratio) {
57 	case 0x10:
58 		sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
59 		break;
60 	case 0x19:
61 		sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
62 		break;
63 	case 0x20:
64 		sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
65 		break;
66 	case 0x39:
67 		sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
68 		break;
69 	case 0x28:
70 		sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
71 		break;
72 	case 0x1d:
73 		sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
74 		break;
75 	default:
76 		sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
77 		break;
78 	}
79 
80 #if defined(CONFIG_SYS_LBC_LCRR)
81 	/* We will program LCRR to this value later */
82 	lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
83 #else
84 	lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV;
85 #endif
86 	if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
87 		sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2);
88 	} else {
89 		/* In case anyone cares what the unknown value is */
90 		sysInfo->freqLocalBus = lcrr_div;
91 	}
92 }
93 
94 
95 /*
96  * Measure CPU clock speed (core clock GCLK1, GCLK2)
97  * (Approx. GCLK frequency in Hz)
98  */
99 
100 int get_clocks(void)
101 {
102 	sys_info_t sys_info;
103 
104 	get_sys_info(&sys_info);
105 	gd->cpu_clk = sys_info.freqProcessor;
106 	gd->bus_clk = sys_info.freqSystemBus;
107 	gd->arch.lbc_clk = sys_info.freqLocalBus;
108 
109 	/*
110 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
111 	 * there is no pattern that can be used to determine the frequency, so
112 	 * the only choice is to look up the actual SOC number and use the value
113 	 * for that SOC. This information is taken from application note
114 	 * AN2919.
115 	 */
116 #ifdef CONFIG_MPC8610
117 	gd->arch.i2c1_clk = sys_info.freqSystemBus;
118 #else
119 	gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
120 #endif
121 	gd->arch.i2c2_clk = gd->arch.i2c1_clk;
122 
123 	if (gd->cpu_clk != 0)
124 		return 0;
125 	else
126 		return 1;
127 }
128 
129 
130 /*
131  * get_bus_freq
132  *	Return system bus freq in Hz
133  */
134 
135 ulong get_bus_freq(ulong dummy)
136 {
137 	ulong val;
138 	sys_info_t sys_info;
139 
140 	get_sys_info(&sys_info);
141 	val = sys_info.freqSystemBus;
142 
143 	return val;
144 }
145