1/*
2 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include "config.h"	/* CONFIG_BOARDDIR */
8
9#ifdef CONFIG_RESET_VECTOR_ADDRESS
10#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
11#else
12#define RESET_VECTOR_ADDRESS	0xfffffffc
13#endif
14
15OUTPUT_ARCH(powerpc)
16ENTRY(_start_e500)
17
18PHDRS
19{
20  text PT_LOAD;
21  bss PT_LOAD;
22}
23
24SECTIONS
25{
26  /* Read-only sections, merged into text segment: */
27  . = + SIZEOF_HEADERS;
28  .interp : { *(.interp) }
29  .text      :
30  {
31    *(.text*)
32   } :text
33    _etext = .;
34    PROVIDE (etext = .);
35    .rodata    :
36   {
37    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
38  } :text
39
40  /* Read-write section, merged into data segment: */
41  . = (. + 0x00FF) & 0xFFFFFF00;
42  _erotext = .;
43  PROVIDE (erotext = .);
44  .reloc   :
45  {
46    _GOT2_TABLE_ = .;
47    KEEP(*(.got2))
48    KEEP(*(.got))
49    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
50    _FIXUP_TABLE_ = .;
51    KEEP(*(.fixup))
52  }
53  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
54  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
55
56  .data    :
57  {
58    *(.data*)
59    *(.sdata*)
60  }
61  _edata  =  .;
62  PROVIDE (edata = .);
63
64  . = .;
65
66  . = ALIGN(4);
67  .u_boot_list : {
68	KEEP(*(SORT(.u_boot_list*)));
69  }
70
71  . = .;
72  __start___ex_table = .;
73  __ex_table : { *(__ex_table) }
74  __stop___ex_table = .;
75
76  . = ALIGN(256);
77  __init_begin = .;
78  .text.init : { *(.text.init) }
79  .data.init : { *(.data.init) }
80  . = ALIGN(256);
81  __init_end = .;
82
83#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
84  .bootpg ADDR(.text) - 0x1000 :
85  {
86    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
87  } :text = 0xffff
88  . = ADDR(.text) + 0x80000;
89#else
90  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
91  {
92    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
93  } :text = 0xffff
94
95  .resetvec RESET_VECTOR_ADDRESS :
96  {
97    KEEP(*(.resetvec))
98  } :text = 0xffff
99
100  . = RESET_VECTOR_ADDRESS + 0x4;
101
102  /*
103   * Make sure that the bss segment isn't linked at 0x0, otherwise its
104   * address won't be updated during relocation fixups.  Note that
105   * this is a temporary fix.  Code to dynamically the fixup the bss
106   * location will be added in the future.  When the bss relocation
107   * fixup code is present this workaround should be removed.
108   */
109#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
110  . |= 0x10;
111#endif
112#endif
113
114  __bss_start = .;
115  .bss (NOLOAD)       :
116  {
117   *(.sbss*)
118   *(.bss*)
119   *(COMMON)
120  } :bss
121
122  . = ALIGN(4);
123  __bss_end = . ;
124  PROVIDE (end = .);
125}
126