1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc. 4 */ 5 6#include "config.h" 7 8#ifdef CONFIG_RESET_VECTOR_ADDRESS 9#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS 10#else 11#define RESET_VECTOR_ADDRESS 0xfffffffc 12#endif 13 14#ifndef CONFIG_SYS_MONITOR_LEN 15#define CONFIG_SYS_MONITOR_LEN 0x80000 16#endif 17 18OUTPUT_ARCH(powerpc) 19ENTRY(_start_e500) 20 21PHDRS 22{ 23 text PT_LOAD; 24 bss PT_LOAD; 25} 26 27SECTIONS 28{ 29 /* Read-only sections, merged into text segment: */ 30 . = + SIZEOF_HEADERS; 31 .interp : { *(.interp) } 32 .text : 33 { 34 *(.text*) 35 } :text 36 _etext = .; 37 PROVIDE (etext = .); 38 .rodata : 39 { 40 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) 41 } :text 42 43 /* Read-write section, merged into data segment: */ 44 . = (. + 0x00FF) & 0xFFFFFF00; 45 _erotext = .; 46 PROVIDE (erotext = .); 47 .reloc : 48 { 49 _GOT2_TABLE_ = .; 50 KEEP(*(.got2)) 51 KEEP(*(.got)) 52 _FIXUP_TABLE_ = .; 53 KEEP(*(.fixup)) 54 } 55 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 56 __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 57 58 .data : 59 { 60 *(.data*) 61 *(.sdata*) 62 } 63 _edata = .; 64 PROVIDE (edata = .); 65 66 . = .; 67 68 . = ALIGN(4); 69 .u_boot_list : { 70 KEEP(*(SORT(.u_boot_list*))); 71 } 72 73 . = .; 74 __start___ex_table = .; 75 __ex_table : { *(__ex_table) } 76 __stop___ex_table = .; 77 78 . = ALIGN(256); 79 __init_begin = .; 80 .text.init : { *(.text.init) } 81 .data.init : { *(.data.init) } 82 . = ALIGN(256); 83 __init_end = .; 84 85#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 86 .bootpg ADDR(.text) - 0x1000 : 87 { 88 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) 89 } :text = 0xffff 90 . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN; 91#else 92 .bootpg RESET_VECTOR_ADDRESS - 0xffc : 93 { 94 arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 95 } :text = 0xffff 96 97 .resetvec RESET_VECTOR_ADDRESS : 98 { 99 KEEP(*(.resetvec)) 100 } :text = 0xffff 101 102 . = RESET_VECTOR_ADDRESS + 0x4; 103 104 /* 105 * Make sure that the bss segment isn't linked at 0x0, otherwise its 106 * address won't be updated during relocation fixups. Note that 107 * this is a temporary fix. Code to dynamically the fixup the bss 108 * location will be added in the future. When the bss relocation 109 * fixup code is present this workaround should be removed. 110 */ 111#if (RESET_VECTOR_ADDRESS == 0xfffffffc) 112 . |= 0x10; 113#endif 114#endif 115 116 __bss_start = .; 117 .bss (NOLOAD) : 118 { 119 *(.sbss*) 120 *(.bss*) 121 *(COMMON) 122 } :bss 123 124 . = ALIGN(4); 125 __bss_end = . ; 126 PROVIDE (end = .); 127} 128